HDLbits 刷题答案 3.1.4 Karnaugh Map to Circuit

3.1.4 Karnaugh Map to Circuit

3.1.4.1 3-variable

module top_module(
    input a,
    input b,
    input c,
    output out  ); 
	
    assign out = a | b | c;
    
endmodule

3.1.4.2 4-variable

module top_module(
    input a,
    input b,
    input c,
    input d,
    output out  ); 
	
    assign out = ~a & ~d | ~b & ~c | b & c & d | a & ~b & d; 
endmodule

3.1.4.3 4-variable

module top_module(
    input a,
    input b,
    input c,
    input d,
    output out  ); 
	assign out = ~b & c | a & c | a & ~d;
endmodule

注意题目给出的卡诺图

3.1.4.4 4-variable

module top_module(
    input a,
    input b,
    input c,
    input d,
    output out  ); 

    assign out = ~a & b & ~c & ~d | a & ~b & ~c & ~d | 
        		 ~a & ~b & ~c & d | a & b & ~c & d | 
        		 ~a & b & c & d | a & ~b & c & d | 
        		 ~a & ~b & c & ~d | a & b & c & ~d;
endmodule

3.1.4.5 Minimum SOP and POS

SOP：sum of product，积之和，即最小项形式
POS：product of sum，和之积，即最大项形式

module top_module (
    input a,
    input b,
    input c,
    input d,
    output out_sop,
    output out_pos
); 
    assign out_sop = (c & d) | (~a & ~b & c) | (~a & ~b & c);
    assign out_pos = ~((~c | ~d) & (a | b | ~c) & (a | b | ~c));
endmodule

3.1.4.6 Karnaugh map

module top_module (
    input [4:1] x, 
    output f );
    assign f= (~x[1] & x[3]) | (x[2] & x[4]);
endmodule

3.1.4.7 Karnaugh map

module top_module (
    input [4:1] x,
    output f
); 
    assign f = (~x[1] & x[3]) | (x[2]& x[3] & x[4]) | (~x[2] & ~x[4]);
endmodule

3.1.4.8 K-map implemented with a multiplexer

由卡诺图可以看出：

• ab = 2’b00 : mux_in[0] = c | d;
• ab = 2’b01 : mux_in[] = 1’b0;
• ab = 2’b10 : mux_in[2] = ~d;
• ab = 2’b11 : mux_in[3] = c & d;

module top_module (
    input c,
    input d,
    output [3:0] mux_in
); 
    assign mux_in[0] = c | d;
    assign mux_in[1] = 1'b0;
    assign mux_in[2] = ~d;
    assign mux_in[3] = c & d;
endmodule