verilog报错处理集合

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已于 2024-06-26 12:33:04 修改

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分类专栏： FPGA专栏_verilog 文章标签： fpga

于 2024-06-07 10:47:52 首次发布

本文链接：https://blog.youkuaiyun.com/wangjie36/article/details/139521083

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这篇博客介绍了在FPGA设计中遇到[DRC NSTD-1]错误的原因和解决方案。错误提示未指定I/O标准，可能导致I/O冲突或不兼容。解决方法是在约束中添加特定的SEVERITY命令，将DRC检查的严重性设置为警告。

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一，[DRC NSTD-1] Unspecified I/O Standard: 1 out of 154 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this

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