AT_dp_p Independent Set

*原题链接*

题意:给一棵树,每一个点可以染成黑色或白色,任意两个相邻节点不能都是黑色,求方案数,结果对1e9+7取模。

非常简单的树形dp,记f_{i,0}为以i节点为根的子树,i涂白色的方案数,f_{i,1}就是涂黑色的方案数,由于题目要求两个相邻节点不能为都为黑色,故得到转移方程:

f_{x,0}=f_{x,0}*(f_{y,0}+f_{y,1})

f_{x,1}=f_{x,1}*f_{y,0}

#include<bits/stdc++.h>
using namespace std;
#define int long long
const int N=1e5+10,mod=1e9+7;

int n,head[N],tot,f[N][2];

struct node{
	int to,nxt;
}edge[N*2];

void add(int x,int y){
	edge[++tot].to=y;
	edge[tot].nxt=head[x];
	head[x]=tot;
}

void dfs(int x,int fa){
	f[x][0]=f[x][1]=1;
	for(int i=head[x];i;i=edge[i].nxt){
		int y=edge[i].to;
		if(y==fa) continue;
		dfs(y,x);
		f[x][0]=(f[x][0]*(f[y][0]+f[y][1]))%mod;
		f[x][1]=(f[x][1]*f[y][0])%mod;
	}
}

signed main(){
	
	cin>>n;
	for(int i=1;i<n;i++){int x,y;cin>>x>>y;add(x,y),add(y,x);}
	dfs(1,0);
	cout<<(f[1][0]+f[1][1])%mod<<endl;
	
	return 0;
}

# # Automatically generated file; DO NOT EDIT. # U-Boot 2022.07 Configuration # CONFIG_CREATE_ARCH_SYMLINK=y CONFIG_SYS_CACHE_SHIFT_5=y CONFIG_SYS_CACHELINE_SIZE=32 # CONFIG_ARC is not set CONFIG_ARM=y # CONFIG_M68K is not set # CONFIG_MICROBLAZE is not set # CONFIG_MIPS is not set # CONFIG_NIOS2 is not set # CONFIG_PPC is not set # CONFIG_RISCV is not set # CONFIG_SANDBOX is not set # CONFIG_SH is not set # CONFIG_X86 is not set # CONFIG_XTENSA is not set CONFIG_SYS_ARCH="arm" CONFIG_SYS_CPU="armv7" CONFIG_SYS_SOC="luofu" CONFIG_SYS_VENDOR="hisilicon" CONFIG_SYS_BOARD="luofu" CONFIG_SYS_CONFIG_NAME="luofu" # CONFIG_SKIP_LOWLEVEL_INIT is not set # CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set # CONFIG_SYS_ICACHE_OFF is not set # CONFIG_SYS_DCACHE_OFF is not set # # ARM architecture # CONFIG_COUNTER_FREQUENCY=250000000 # CONFIG_POSITION_INDEPENDENT is not set # CONFIG_GIC_V3_ITS is not set CONFIG_HAS_VBAR=y CONFIG_HAS_THUMB2=y CONFIG_ARM_ASM_UNIFIED=y CONFIG_SYS_ARM_CACHE_CP15=y CONFIG_SYS_ARM_MMU=y # CONFIG_SYS_ARM_MPU is not set CONFIG_CPU_V7A=y CONFIG_SYS_ARM_ARCH=7 CONFIG_SYS_ARM_CACHE_WRITEBACK=y # CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set # CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set # CONFIG_ARCH_CPU_INIT is not set # CONFIG_SYS_ARCH_TIMER is not set # CONFIG_ARM_SMCCC is not set # CONFIG_SEMIHOSTING is not set # CONFIG_SYS_THUMB_BUILD is not set # CONFIG_SYS_L2CACHE_OFF is not set # CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK is not set CONFIG_USE_ARCH_MEMCPY=y CONFIG_USE_ARCH_MEMSET=y # CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_KIRKWOOD is not set # CONFIG_ARCH_MVEBU is not set # CONFIG_ARCH_ORION5X is not set # CONFIG_TARGET_STV0991 is not set # CONFIG_ARCH_BCM283X is not set # CONFIG_ARCH_BCM63158 is not set # CONFIG_ARCH_BCM6753 is not set # CONFIG_ARCH_BCM68360 is not set # CONFIG_ARCH_BCM6858 is not set # CONFIG_ARCH_BCMSTB is not set # CONFIG_TARGET_VEXPRESS_CA9X4 is not set # CONFIG_TARGET_BCMCYGNUS is not set # CONFIG_TARGET_BCMNS2 is not set # CONFIG_TARGET_BCMNS3 is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_S5PC1XX is not set # CONFIG_ARCH_HIGHBANK is not set # CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_IPQ40XX is not set # CONFIG_ARCH_KEYSTONE is not set # CONFIG_ARCH_K3 is not set # CONFIG_ARCH_OMAP2PLUS is not set # CONFIG_ARCH_MESON is not set # CONFIG_ARCH_MEDIATEK is not set # CONFIG_ARCH_LPC32XX is not set # CONFIG_ARCH_IMX8 is not set # CONFIG_ARCH_IMX8M is not set # CONFIG_ARCH_IMX8ULP is not set # CONFIG_ARCH_IMXRT is not set # CONFIG_ARCH_MX23 is not set # CONFIG_ARCH_MX28 is not set # CONFIG_ARCH_MX31 is not set # CONFIG_ARCH_MX7ULP is not set # CONFIG_ARCH_MX7 is not set # CONFIG_ARCH_MX6 is not set # CONFIG_ARCH_MX5 is not set # CONFIG_ARCH_NEXELL is not set # CONFIG_ARCH_NPCM is not set # CONFIG_ARCH_APPLE is not set # CONFIG_ARCH_OWL is not set # CONFIG_ARCH_QEMU is not set # CONFIG_ARCH_RMOBILE is not set # CONFIG_ARCH_SNAPDRAGON is not set # CONFIG_ARCH_SOCFPGA is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_VERSAL is not set # CONFIG_ARCH_VF610 is not set # CONFIG_ARCH_ZYNQ is not set # CONFIG_ARCH_ZYNQMP_R5 is not set # CONFIG_ARCH_ZYNQMP is not set # CONFIG_ARCH_TEGRA is not set # CONFIG_ARCH_VEXPRESS64 is not set # CONFIG_TARGET_TOTAL_COMPUTE is not set # CONFIG_TARGET_LS2080A_EMU is not set # CONFIG_TARGET_LS1088AQDS is not set # CONFIG_TARGET_LS2080AQDS is not set # CONFIG_TARGET_LS2080ARDB is not set # CONFIG_TARGET_LS2081ARDB is not set # CONFIG_TARGET_LX2160ARDB is not set # CONFIG_TARGET_LX2160AQDS is not set # CONFIG_TARGET_LX2162AQDS is not set # CONFIG_TARGET_HIKEY is not set # CONFIG_TARGET_HIKEY960 is not set # CONFIG_TARGET_POPLAR is not set # CONFIG_TARGET_LS1012AQDS is not set # CONFIG_TARGET_LS1012ARDB is not set # CONFIG_TARGET_LS1012A2G5RDB is not set # CONFIG_TARGET_LS1012AFRWY is not set # CONFIG_TARGET_LS1012AFRDM is not set # CONFIG_TARGET_LS1028AQDS is not set # CONFIG_TARGET_LS1028ARDB is not set # CONFIG_TARGET_LS1088ARDB is not set # CONFIG_TARGET_LS1021AQDS is not set # CONFIG_TARGET_LS1021ATWR is not set # CONFIG_TARGET_PG_WCOM_SELI8 is not set # CONFIG_TARGET_PG_WCOM_EXPU1 is not set # CONFIG_TARGET_LS1021ATSN is not set # CONFIG_TARGET_LS1021AIOT is not set # CONFIG_TARGET_LS1043AQDS is not set # CONFIG_TARGET_LS1043ARDB is not set # CONFIG_TARGET_LS1046AQDS is not set # CONFIG_TARGET_LS1046ARDB is not set # CONFIG_TARGET_LS1046AFRWY is not set # CONFIG_TARGET_SL28 is not set # CONFIG_TARGET_TEN64 is not set # CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_SYNQUACER is not set # CONFIG_ARCH_STM32 is not set # CONFIG_ARCH_STI is not set # CONFIG_ARCH_STM32MP is not set # CONFIG_ARCH_ROCKCHIP is not set # CONFIG_ARCH_OCTEONTX is not set # CONFIG_ARCH_OCTEONTX2 is not set # CONFIG_TARGET_THUNDERX_88XX is not set # CONFIG_ARCH_ASPEED is not set # CONFIG_TARGET_DURIAN is not set # CONFIG_TARGET_POMELO is not set # CONFIG_TARGET_PRESIDIO_ASIC is not set # CONFIG_TARGET_XENGUEST_ARM64 is not set CONFIG_TARGET_LUOFU=y # CONFIG_TARGET_XILING is not set # CONFIG_TARGET_EMEI is not set # CONFIG_TARGET_QISHAN is not set # CONFIG_TARGET_TIANGONG2 is not set # CONFIG_TARGET_TIANGONG1 is not set CONFIG_SUPPORT_PASSING_ATAGS=y # CONFIG_SETUP_MEMORY_TAGS is not set # CONFIG_CMDLINE_TAG is not set # CONFIG_INITRD_TAG is not set # CONFIG_REVISION_TAG is not set CONFIG_SERIAL_TAG=y # CONFIG_STATIC_MACH_TYPE is not set CONFIG_SYS_TEXT_BASE=0x80040000 CONFIG_SYS_MALLOC_LEN=0x1400000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x240000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="luofu" CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000 CONFIG_ERR_PTR_OFFSET=0x0 CONFIG_BOOTSTAGE_STASH_ADDR=0 CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_IDENT_STRING=" for luofu" CONFIG_SYS_CLK_FREQ=0 # CONFIG_CHIP_DIP_SCAN is not set # CONFIG_HAS_ARMV7_SECURE_BASE is not set # CONFIG_ARMV7_LPAE is not set # CONFIG_CMD_DEKBLOB is not set # CONFIG_IMX_CAAM_DEK_ENCAP is not set # CONFIG_IMX_OPTEE_DEK_ENCAP is not set # CONFIG_IMX_SECO_DEK_ENCAP is not set # CONFIG_CMD_HDMIDETECT is not set # CONFIG_CMD_NANDBCB is not set CONFIG_IMX_DCD_ADDR=0x00910000 CONFIG_SYS_MEM_TOP_HIDE=0x0 CONFIG_SYS_LOAD_ADDR=0x83200000 # # ARM debug # # CONFIG_DEBUG_LL is not set CONFIG_HSAN=y CONFIG_MULTIUPG=y CONFIG_ACTIVE_STANDBY_BOOT=y CONFIG_CHIP_LUOFU=y CONFIG_BUILD_TARGET="" # CONFIG_DEBUG_UART is not set # CONFIG_AHCI is not set # CONFIG_OF_BOARD_FIXUP is not set # # General setup # CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set # CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set # CONFIG_OPTIMIZE_INLINING is not set CONFIG_ARCH_SUPPORTS_LTO=y # CONFIG_LTO is not set # CONFIG_XEN is not set # CONFIG_DISTRO_DEFAULTS is not set # CONFIG_ENV_VARS_UBOOT_CONFIG is not set # CONFIG_SYS_BOOT_GET_CMDLINE is not set # CONFIG_SYS_BOOT_GET_KBD is not set CONFIG_SYS_MALLOC_F=y # CONFIG_VALGRIND is not set CONFIG_EXPERT=y CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y # CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set # CONFIG_TOOLS_DEBUG is not set # CONFIG_PHYS_64BIT is not set # CONFIG_REMAKE_ELF is not set # CONFIG_HAS_BOARD_SIZE_LIMIT is not set # CONFIG_SYS_CUSTOM_LDSCRIPT is not set CONFIG_PLATFORM_ELFENTRY="_start" CONFIG_STACK_SIZE=0x1000000 CONFIG_SYS_SRAM_BASE=0x0 CONFIG_SYS_SRAM_SIZE=0x0 # CONFIG_MP is not set # CONFIG_EXAMPLES is not set # # API # # CONFIG_API is not set # # Boot options # # # Boot images # # CONFIG_ANDROID_BOOT_IMAGE is not set # CONFIG_FIT is not set # CONFIG_TIMESTAMP is not set CONFIG_BOOTSTD=y # CONFIG_BOOTSTD_FULL is not set CONFIG_BOOTSTD_BOOTCOMMAND=y # CONFIG_BOOTMETH_SCRIPT is not set CONFIG_LEGACY_IMAGE_FORMAT=y # CONFIG_SUPPORT_RAW_INITRD is not set # CONFIG_OF_BOARD_SETUP is not set # CONFIG_OF_SYSTEM_SETUP is not set # CONFIG_OF_STDOUT_VIA_ALIAS is not set CONFIG_SYS_EXTRA_OPTIONS="" CONFIG_HAVE_SYS_TEXT_BASE=y # CONFIG_DYNAMIC_SYS_CLK_FREQ is not set CONFIG_ARCH_FIXUP_FDT_MEMORY=y # CONFIG_CHROMEOS is not set # CONFIG_CHROMEOS_VBOOT is not set # CONFIG_RAMBOOT_PBL is not set # # Boot timing # # CONFIG_BOOTSTAGE is not set CONFIG_BOOTSTAGE_STASH_SIZE=0x1000 # CONFIG_SHOW_BOOT_PROGRESS is not set # # Boot media # # CONFIG_NAND_BOOT is not set # CONFIG_ONENAND_BOOT is not set # CONFIG_QSPI_BOOT is not set # CONFIG_SATA_BOOT is not set # CONFIG_SD_BOOT is not set # CONFIG_SD_BOOT_QSPI is not set # CONFIG_SPI_BOOT is not set # # Autoboot options # CONFIG_AUTOBOOT=y CONFIG_BOOTDELAY=3 # CONFIG_AUTOBOOT_KEYED is not set # CONFIG_AUTOBOOT_USE_MENUKEY is not set # CONFIG_AUTOBOOT_MENU_SHOW is not set # CONFIG_BOOT_RETRY is not set # # Image support # # CONFIG_IMAGE_PRE_LOAD is not set # CONFIG_USE_BOOTARGS is not set # CONFIG_BOOTARGS_SUBST is not set # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_USE_PREBOOT is not set CONFIG_DEFAULT_FDT_FILE="" # CONFIG_SAVE_PREV_BL_FDT_ADDR is not set # CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set # # Console # CONFIG_MENU=y # CONFIG_CONSOLE_RECORD is not set # CONFIG_DISABLE_CONSOLE is not set CONFIG_LOGLEVEL=4 CONFIG_SPL_LOGLEVEL=4 CONFIG_TPL_LOGLEVEL=4 # CONFIG_SILENT_CONSOLE is not set # CONFIG_PRE_CONSOLE_BUFFER is not set # CONFIG_CONSOLE_MUX is not set # CONFIG_SYS_CONSOLE_IS_IN_ENV is not set # CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set # CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set # CONFIG_SYS_CONSOLE_INFO_QUIET is not set # CONFIG_SYS_STDIO_DEREGISTER is not set # CONFIG_SPL_SYS_STDIO_DEREGISTER is not set # CONFIG_SYS_DEVICE_NULLDEV is not set # # Logging # # CONFIG_LOG is not set # # Init options # # CONFIG_BOARD_TYPES is not set # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO_LATE is not set # # Start-up hooks # # CONFIG_EVENT is not set # CONFIG_ARCH_EARLY_INIT_R is not set # CONFIG_ARCH_MISC_INIT is not set # CONFIG_BOARD_EARLY_INIT_F is not set # CONFIG_BOARD_EARLY_INIT_R is not set # CONFIG_BOARD_POSTCLK_INIT is not set CONFIG_BOARD_LATE_INIT=y # CONFIG_CLOCKS is not set # CONFIG_LAST_STAGE_INIT is not set CONFIG_MISC_INIT_R=y # CONFIG_ID_EEPROM is not set # CONFIG_RESET_PHY_R is not set # # Security support # # CONFIG_STACKPROTECTOR is not set # # Update support # # CONFIG_ANDROID_AB is not set # # Blob list # # CONFIG_BLOBLIST is not set # # SPL / TPL / VPL # CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa # CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set # CONFIG_SPL_SHOW_ERRORS is not set # # PowerPC and LayerScape SPL Boot options # # CONFIG_SPL_MD5 is not set # CONFIG_FDT_SIMPLEFB is not set # # Command line interface # CONFIG_CMDLINE=y # CONFIG_HUSH_PARSER is not set CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_SYS_LONGHELP=y CONFIG_SYS_PROMPT="luofu # " CONFIG_SYS_XTRACE=y # # Commands # # # Info commands # # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONFIG is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_CPU is not set # CONFIG_CMD_LICENSE is not set # CONFIG_CMD_PMC is not set # # Boot commands # CONFIG_CMD_BOOTD=y CONFIG_CMD_BOOTM=y # CONFIG_CMD_BOOTDEV is not set # CONFIG_CMD_BOOTFLOW is not set # CONFIG_CMD_BOOTMETH is not set # CONFIG_CMD_BOOTZ is not set CONFIG_BOOTM_LINUX=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_OPENRTOS is not set # CONFIG_BOOTM_OSE is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ADTIMG is not set # CONFIG_CMD_ELF is not set CONFIG_CMD_FDT=y CONFIG_CMD_GO=y CONFIG_CMD_RUN=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_THOR_DOWNLOAD is not set # CONFIG_CMD_ZBOOT is not set # # Environment commands # # CONFIG_CMD_ASKENV is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_GREPENV is not set CONFIG_CMD_SAVEENV=y # CONFIG_CMD_ERASEENV is not set # CONFIG_CMD_ENV_EXISTS is not set # CONFIG_CMD_ENV_CALLBACK is not set # CONFIG_CMD_ENV_FLAGS is not set # CONFIG_CMD_NVEDIT_INDIRECT is not set # CONFIG_CMD_NVEDIT_INFO is not set # CONFIG_CMD_NVEDIT_LOAD is not set # CONFIG_CMD_NVEDIT_SELECT is not set # # Memory commands # # CONFIG_CMD_BINOP is not set # CONFIG_CMD_BLOBLIST is not set # CONFIG_CMD_CRC32 is not set # CONFIG_CMD_EEPROM is not set # CONFIG_LOOPW is not set # CONFIG_CMD_MD5SUM is not set # CONFIG_CMD_MEMINFO is not set CONFIG_CMD_MEMORY=y # CONFIG_CMD_MEM_SEARCH is not set # CONFIG_CMD_MX_CYCLIC is not set # CONFIG_CMD_RANDOM is not set # CONFIG_CMD_MEMTEST is not set # CONFIG_CMD_SHA1SUM is not set # CONFIG_CMD_STRINGS is not set # # Compression commands # # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNLZ4 is not set # CONFIG_CMD_UNZIP is not set # CONFIG_CMD_ZIP is not set # # Device access commands # # CONFIG_CMD_ARMFLASH is not set # CONFIG_CMD_BIND is not set # CONFIG_CMD_CLK is not set # CONFIG_CMD_DEMO is not set # CONFIG_CMD_DFU is not set # CONFIG_CMD_DM is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGAD is not set # CONFIG_CMD_FUSE is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_GPIO_READ is not set # CONFIG_CMD_GPT is not set # CONFIG_RANDOM_UUID is not set # CONFIG_CMD_IDE is not set # CONFIG_CMD_IO is not set # CONFIG_CMD_IOTRACE is not set # CONFIG_CMD_I2C is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_LSBLK is not set # CONFIG_CMD_MBR is not set # CONFIG_CMD_MISC is not set # CONFIG_CMD_CLONE is not set CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y # CONFIG_CMD_NAND_TRIMFFS is not set # CONFIG_CMD_NAND_LOCK_UNLOCK is not set # CONFIG_CMD_NAND_TORTURE is not set # CONFIG_CMD_ONENAND is not set # CONFIG_CMD_OSD is not set # CONFIG_CMD_PCI is not set # CONFIG_CMD_POWEROFF is not set # CONFIG_CMD_READ is not set # CONFIG_CMD_SATA is not set # CONFIG_CMD_SAVES is not set # CONFIG_CMD_SCSI is not set # CONFIG_CMD_SDRAM is not set # CONFIG_CMD_TSI148 is not set # CONFIG_CMD_UNIVERSE is not set # CONFIG_CMD_USB_SDP is not set # CONFIG_CMD_WDT is not set # # Shell scripting commands # # CONFIG_CMD_ECHO is not set # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set # # Android support commands # CONFIG_CMD_NET=y CONFIG_CMD_BOOTP=y # CONFIG_CMD_DHCP is not set # CONFIG_BOOTP_MAY_FAIL is not set CONFIG_BOOTP_BOOTPATH=y # CONFIG_BOOTP_VENDOREX is not set # CONFIG_BOOTP_BOOTFILESIZE is not set CONFIG_BOOTP_DNS=y # CONFIG_BOOTP_DNS2 is not set CONFIG_BOOTP_GATEWAY=y CONFIG_BOOTP_HOSTNAME=y # CONFIG_BOOTP_PREFER_SERVERIP is not set CONFIG_BOOTP_SUBNETMASK=y # CONFIG_BOOTP_NISDOMAIN is not set # CONFIG_BOOTP_NTPSERVER is not set # CONFIG_CMD_PCAP is not set CONFIG_BOOTP_VCI_STRING="U-Boot.armv7" CONFIG_CMD_TFTPBOOT=y # CONFIG_CMD_TFTPPUT is not set # CONFIG_CMD_TFTPSRV is not set CONFIG_NET_TFTP_VARS=y # CONFIG_CMD_RARP is not set # CONFIG_CMD_NFS is not set # CONFIG_CMD_MII is not set # CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y # CONFIG_CMD_CDP is not set # CONFIG_CMD_SNTP is not set # CONFIG_CMD_DNS is not set # CONFIG_CMD_LINK_LOCAL is not set # CONFIG_CMD_ETHSW is not set # CONFIG_CMD_PXE is not set # CONFIG_CMD_WOL is not set # # Misc commands # # CONFIG_CMD_BSP is not set # CONFIG_CMD_BLOCK_CACHE is not set CONFIG_CMD_CACHE=y # CONFIG_CMD_CONITRACE is not set # CONFIG_CMD_EXCEPTION is not set # CONFIG_CMD_DATE is not set # CONFIG_CMD_TIME is not set # CONFIG_CMD_GETTIME is not set # CONFIG_CMD_SLEEP is not set # CONFIG_CMD_TIMER is not set # CONFIG_CMD_SYSBOOT is not set # CONFIG_CMD_QFW is not set # CONFIG_CMD_PSTORE is not set # CONFIG_CMD_TERMINAL is not set # CONFIG_CMD_UUID is not set # # TI specific command line interface # # CONFIG_CMD_DDR3 is not set # # Power commands # # # Security commands # # CONFIG_CMD_AES is not set # CONFIG_CMD_BLOB is not set # CONFIG_CMD_HASH is not set # # Firmware commands # # # Filesystem commands # # CONFIG_CMD_BTRFS is not set # CONFIG_CMD_EROFS is not set # CONFIG_CMD_EXT2 is not set # CONFIG_CMD_EXT4 is not set # CONFIG_CMD_FAT is not set # CONFIG_CMD_SQUASHFS is not set # CONFIG_CMD_FS_GENERIC is not set # CONFIG_CMD_FS_UUID is not set # CONFIG_CMD_JFFS2 is not set CONFIG_CMD_MTDPARTS=y # CONFIG_CMD_MTDPARTS_SPREAD is not set # CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES is not set CONFIG_MTDIDS_DEFAULT="nand0=hi_nfc,nor0=hi_sfc" CONFIG_MTDPARTS_DEFAULT="" # CONFIG_CMD_REISER is not set # CONFIG_CMD_ZFS is not set # # Debug commands # # CONFIG_CMD_DIAG is not set # CONFIG_CMD_EVENT is not set # CONFIG_CMD_LOG is not set # CONFIG_CMD_UBI is not set # # Partition Types # # CONFIG_MAC_PARTITION is not set # CONFIG_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set # CONFIG_AMIGA_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_SUPPORT_OF_CONTROL=y # # Device Tree Control # CONFIG_OF_CONTROL=y CONFIG_OF_REAL=y # CONFIG_OF_LIVE is not set CONFIG_OF_SEPARATE=y # CONFIG_OF_EMBED is not set # CONFIG_OF_BOARD is not set CONFIG_OF_OMIT_DTB=y CONFIG_DEVICE_TREE_INCLUDES="" CONFIG_OF_LIST="luofu" # CONFIG_MULTI_DTB_FIT is not set # CONFIG_OF_DTB_PROPS_REMOVE is not set CONFIG_VPL_OF_REAL=y # # Environment # CONFIG_ENV_SUPPORT=y CONFIG_ENV_SOURCE_FILE="" CONFIG_SAVEENV=y # CONFIG_ENV_OVERWRITE is not set # CONFIG_ENV_IS_NOWHERE is not set # CONFIG_ENV_IS_IN_EEPROM is not set # CONFIG_ENV_IS_IN_FAT is not set # CONFIG_ENV_IS_IN_EXT4 is not set # CONFIG_ENV_IS_IN_FLASH is not set CONFIG_ENV_IS_IN_NAND=y # CONFIG_ENV_IS_IN_NVRAM is not set # CONFIG_ENV_IS_IN_ONENAND is not set # CONFIG_ENV_IS_IN_REMOTE is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y # CONFIG_SYS_RELOC_GD_ENV_ADDR is not set # CONFIG_USE_DEFAULT_ENV_FILE is not set # CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set # CONFIG_ENV_IMPORT_FDT is not set # CONFIG_ENV_APPEND is not set # CONFIG_ENV_WRITEABLE_LIST is not set # CONFIG_ENV_ACCESS_IGNORE_FORCE is not set # CONFIG_USE_BOOTFILE is not set # CONFIG_USE_ETHPRIME is not set # CONFIG_VERSION_VARIABLE is not set CONFIG_NET=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=20 # CONFIG_PROT_UDP is not set CONFIG_BOOTDEV_ETH=y # CONFIG_BOOTP_SEND_HOSTNAME is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y # CONFIG_IP_DEFRAG is not set # CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set CONFIG_TFTP_BLOCKSIZE=512 # CONFIG_TFTP_PORT is not set CONFIG_TFTP_WINDOWSIZE=1 # CONFIG_TFTP_TSIZE is not set # CONFIG_SERVERIP_FROM_PROXYDHCP is not set CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100 # CONFIG_KEEP_SERVERADDR is not set # CONFIG_UDP_CHECKSUM is not set # CONFIG_BOOTP_SERVERIP is not set # # Device Drivers # # # Generic Driver Options # CONFIG_DM=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEBUG is not set CONFIG_DM_DEVICE_REMOVE=y # CONFIG_DM_EVENT is not set CONFIG_DM_STDIO=y CONFIG_DM_SEQ_ALIAS=y # CONFIG_DM_DMA is not set CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_DEVRES is not set CONFIG_SIMPLE_BUS=y # CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set # CONFIG_OF_TRANSLATE is not set # CONFIG_TRANSLATION_OFFSET is not set CONFIG_DM_DEV_READ_INLINE=y # CONFIG_ACPIGEN is not set CONFIG_BOUNCE_BUFFER=y # CONFIG_ADC is not set # CONFIG_ADC_EXYNOS is not set # CONFIG_ADC_SANDBOX is not set # CONFIG_SARADC_MESON is not set # CONFIG_SARADC_ROCKCHIP is not set # CONFIG_SATA is not set # CONFIG_SCSI_AHCI is not set # # SATA/SCSI device support # # CONFIG_AXI is not set # # Bus devices # CONFIG_BLK=y CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_BLOCK_CACHE=y # CONFIG_EFI_MEDIA is not set # CONFIG_IDE is not set # CONFIG_BOOTCOUNT_LIMIT is not set # # Button Support # # CONFIG_BUTTON is not set # # Cache Controller drivers # # CONFIG_CACHE is not set CONFIG_L2X0_CACHE=y # CONFIG_NCORE_CACHE is not set # CONFIG_SIFIVE_CCACHE is not set # # Clock # CONFIG_CLK=y # CONFIG_CLK_CCF is not set # CONFIG_CLK_CDCE9XX is not set # CONFIG_CLK_ICS8N3QV01 is not set # CONFIG_CLK_K210 is not set # CONFIG_CLK_MPC83XX is not set # CONFIG_CLK_XLNX_CLKWZRD is not set # CONFIG_CLK_AT91 is not set # CONFIG_CLK_SIFIVE is not set # CONFIG_CLK_TI_AM3_DPLL is not set # CONFIG_CLK_TI_CTRL is not set # CONFIG_CLK_TI_GATE is not set # CONFIG_CLK_K3 is not set CONFIG_CPU=y # # Hardware crypto devices # # CONFIG_DM_HASH is not set # CONFIG_FSL_CAAM is not set # CONFIG_SYS_FSL_SEC_BE is not set # CONFIG_SYS_FSL_SEC_LE is not set # CONFIG_DDR_SPD is not set # # Demo for driver model # # CONFIG_DM_DEMO is not set # # DFU support # # # DMA Support # # CONFIG_DMA is not set # CONFIG_DMA_LPC32XX is not set # CONFIG_TI_EDMA3 is not set # CONFIG_DMA_LEGACY is not set # # Fastboot support # # CONFIG_UDP_FUNCTION_FASTBOOT is not set # CONFIG_FIRMWARE is not set # CONFIG_ZYNQMP_FIRMWARE is not set # # FPGA support # # CONFIG_FPGA_ALTERA is not set # CONFIG_FPGA_SOCFPGA is not set # CONFIG_FPGA_XILINX is not set CONFIG_GPIO=y # CONFIG_GPIO_HOG is not set # CONFIG_DM_GPIO_LOOKUP_LABEL is not set # CONFIG_ALTERA_PIO is not set # CONFIG_BCM2835_GPIO is not set CONFIG_DWAPB_GPIO=y # CONFIG_AT91_GPIO is not set # CONFIG_ATMEL_PIO4 is not set # CONFIG_ASPEED_GPIO is not set # CONFIG_DA8XX_GPIO is not set # CONFIG_INTEL_BROADWELL_GPIO is not set # CONFIG_INTEL_GPIO is not set # CONFIG_INTEL_ICH6_GPIO is not set # CONFIG_IMX_RGPIO2P is not set # CONFIG_IPROC_GPIO is not set # CONFIG_HSDK_CREG_GPIO is not set # CONFIG_KIRKWOOD_GPIO is not set # CONFIG_LPC32XX_GPIO is not set # CONFIG_MCP230XX_GPIO is not set # CONFIG_MSM_GPIO is not set # CONFIG_MXC_GPIO is not set # CONFIG_MXS_GPIO is not set # CONFIG_NPCM_GPIO is not set # CONFIG_CMD_PCA953X is not set # CONFIG_ROCKCHIP_GPIO is not set # CONFIG_XILINX_GPIO is not set # CONFIG_CMD_TCA642X is not set # CONFIG_TEGRA_GPIO is not set # CONFIG_TEGRA186_GPIO is not set # CONFIG_VYBRID_GPIO is not set # CONFIG_SIFIVE_GPIO is not set # CONFIG_ZYNQ_GPIO is not set # CONFIG_DM_74X164 is not set # CONFIG_SPL_DM_PCA953X is not set # CONFIG_MPC8XXX_GPIO is not set # CONFIG_NX_GPIO is not set # CONFIG_NOMADIK_GPIO is not set # CONFIG_ZYNQMP_GPIO_MODEPIN is not set # CONFIG_SLG7XL45106_I2C_GPO is not set # # Hardware Spinlock Support # # CONFIG_DM_HWSPINLOCK is not set # CONFIG_I2C is not set # CONFIG_INPUT is not set # CONFIG_DM_KEYBOARD is not set # CONFIG_KEYBOARD is not set # CONFIG_TEGRA_KEYBOARD is not set # CONFIG_TWL4030_INPUT is not set # # IOMMU device drivers # # CONFIG_IOMMU is not set # # LED Support # # CONFIG_LED is not set # CONFIG_LED_STATUS is not set # # Mailbox Controller Support # # CONFIG_DM_MAILBOX is not set # # Memory Controller drivers # # # Multifunction device drivers # CONFIG_MISC=y # CONFIG_ALTERA_SYSID is not set # CONFIG_ATSHA204A is not set # CONFIG_GATEWORKS_SC is not set # CONFIG_ROCKCHIP_EFUSE is not set # CONFIG_ROCKCHIP_OTP is not set # CONFIG_SIFIVE_OTP is not set # CONFIG_VEXPRESS_CONFIG is not set # CONFIG_CROS_EC is not set # CONFIG_DS4510 is not set # CONFIG_FSL_SEC_MON is not set # CONFIG_IRQ is not set # CONFIG_NUVOTON_NCT6102D is not set # CONFIG_PWRSEQ is not set # CONFIG_PCA9551_LED is not set # CONFIG_TEST_DRV is not set # CONFIG_TWL4030_LED is not set # CONFIG_WINBOND_W83627 is not set # CONFIG_I2C_EEPROM is not set # CONFIG_GDSYS_RXAUI_CTRL is not set # CONFIG_GDSYS_IOEP is not set # CONFIG_MPC83XX_SERDES is not set # CONFIG_FS_LOADER is not set # CONFIG_SPL_FS_LOADER is not set # CONFIG_GDSYS_SOC is not set # CONFIG_IHS_FPGA is not set # CONFIG_MICROCHIP_FLEXCOM is not set # # MMC Host controller Support # # CONFIG_MMC is not set # CONFIG_MMC_BROKEN_CD is not set # CONFIG_DM_MMC is not set # CONFIG_FSL_ESDHC is not set # CONFIG_FSL_ESDHC_IMX is not set # # MTD Support # CONFIG_MTD_PARTITIONS=y CONFIG_MTD=y CONFIG_DM_MTD=y # CONFIG_MTD_NOR_FLASH is not set # CONFIG_MTD_CONCAT is not set CONFIG_SYS_MTDPARTS_RUNTIME=y # CONFIG_FLASH_CFI_DRIVER is not set # CONFIG_CFI_FLASH is not set # CONFIG_ALTERA_QSPI is not set # CONFIG_HBMC_AM654 is not set # CONFIG_USE_SYS_MAX_FLASH_BANKS is not set CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT is not set CONFIG_SYS_NAND_USE_FLASH_BBT=y # CONFIG_NAND_ATMEL is not set # CONFIG_NAND_BRCMNAND is not set # CONFIG_NAND_DAVINCI is not set # CONFIG_NAND_DENALI_DT is not set # CONFIG_NAND_FSL_IFC is not set # CONFIG_NAND_LPC32XX_MLC is not set # CONFIG_NAND_LPC32XX_SLC is not set # CONFIG_NAND_VF610_NFC is not set # CONFIG_NAND_PXA3XX is not set # CONFIG_NAND_ARASAN is not set # CONFIG_NAND_MXIC is not set # CONFIG_NAND_ZYNQ is not set # CONFIG_NAND_OCTEONTX is not set # # Generic NAND options # # CONFIG_SYS_NAND_ONFI_DETECTION is not set # # SPI Flash Support # # CONFIG_SPI_FLASH is not set # # UBI support # # CONFIG_UBI_SILENCE_MSG is not set # CONFIG_MTD_UBI is not set # # Multiplexer drivers # # CONFIG_MULTIPLEXER is not set # CONFIG_BITBANGMII is not set # CONFIG_MV88E6352_SWITCH is not set CONFIG_PHYLIB=y # CONFIG_PHY_ADDR_ENABLE is not set # CONFIG_B53_SWITCH is not set # CONFIG_MV88E61XX_SWITCH is not set # CONFIG_PHYLIB_10G is not set # CONFIG_PHY_ADIN is not set # CONFIG_PHY_AQUANTIA is not set # CONFIG_PHY_ATHEROS is not set # CONFIG_PHY_BROADCOM is not set # CONFIG_PHY_CORTINA is not set # CONFIG_PHY_DAVICOM is not set # CONFIG_PHY_ET1011C is not set # CONFIG_PHY_LXT is not set # CONFIG_PHY_MARVELL is not set # CONFIG_PHY_MESON_GXL is not set # CONFIG_PHY_MICREL is not set # CONFIG_PHY_MSCC is not set # CONFIG_PHY_NATSEMI is not set # CONFIG_PHY_NXP_C45_TJA11XX is not set # CONFIG_PHY_NXP_TJA11XX is not set # CONFIG_PHY_REALTEK is not set # CONFIG_PHY_SMSC is not set # CONFIG_PHY_TERANETICS is not set # CONFIG_PHY_TI is not set # CONFIG_PHY_TI_DP83867 is not set # CONFIG_PHY_TI_DP83869 is not set # CONFIG_PHY_TI_GENERIC is not set # CONFIG_PHY_VITESSE is not set # CONFIG_PHY_XILINX is not set # CONFIG_PHY_XILINX_GMII2RGMII is not set # CONFIG_PHY_ETHERNET_ID is not set # CONFIG_PHY_FIXED is not set # CONFIG_PHY_NCSI is not set CONFIG_PHY_RESET_DELAY=0 # CONFIG_FSL_PFE is not set # CONFIG_BNXT_ETH is not set CONFIG_ETH=y CONFIG_DM_ETH=y # CONFIG_DM_MDIO is not set # CONFIG_DM_ETH_PHY is not set CONFIG_NETDEVICES=y # CONFIG_PHY_GIGE is not set # CONFIG_ALTERA_TSE is not set # CONFIG_BCM_SF2_ETH is not set # CONFIG_BCMGENET is not set # CONFIG_CALXEDA_XGMAC is not set # CONFIG_DRIVER_DM9000 is not set # CONFIG_DWC_ETH_QOS is not set # CONFIG_EEPRO100 is not set # CONFIG_ETH_DESIGNWARE is not set # CONFIG_ETH_DESIGNWARE_MESON8B is not set # CONFIG_ETHOC is not set # CONFIG_FMAN_ENET is not set # CONFIG_FTMAC100 is not set # CONFIG_FTGMAC100 is not set # CONFIG_MCFFEC is not set # CONFIG_FSLDMAFEC is not set # CONFIG_KS8851_MLL is not set # CONFIG_MACB is not set # CONFIG_PCH_GBE is not set # CONFIG_RGMII is not set CONFIG_MII=y # CONFIG_RMII is not set # CONFIG_PCNET is not set # CONFIG_QE_UEC is not set # CONFIG_RTL8139 is not set # CONFIG_RTL8169 is not set # CONFIG_SMC911X is not set # CONFIG_SUN7I_GMAC is not set # CONFIG_SUN4I_EMAC is not set # CONFIG_SUN8I_EMAC is not set # CONFIG_SH_ETHER is not set # CONFIG_DRIVER_TI_CPSW is not set # CONFIG_DRIVER_TI_EMAC is not set # CONFIG_DRIVER_TI_KEYSTONE_NET is not set # CONFIG_TULIP is not set # CONFIG_XILINX_AXIEMAC is not set # CONFIG_XILINX_EMACLITE is not set # CONFIG_ZYNQ_GEM is not set # CONFIG_SYS_DPAA_QBMAN is not set # CONFIG_TSEC_ENET is not set # CONFIG_MEDIATEK_ETH is not set # CONFIG_HIGMACV300_ETH is not set # CONFIG_NVME is not set # CONFIG_NVME_APPLE is not set # CONFIG_PCI is not set # # PCI Endpoint # # CONFIG_PCI_ENDPOINT is not set # CONFIG_X86_PCH7 is not set # CONFIG_X86_PCH9 is not set # # PHY Subsystem # CONFIG_PHY=y # CONFIG_NOP_PHY is not set # CONFIG_MIPI_DPHY_HELPERS is not set # CONFIG_BCM_SR_PCIE_PHY is not set # CONFIG_MSM8916_USB_PHY is not set # CONFIG_OMAP_USB2_PHY is not set # # Rockchip PHY driver # # CONFIG_PHY_CADENCE_SIERRA is not set # CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_MVEBU_COMPHY_SUPPORT is not set # # Pin controllers # # CONFIG_PINCTRL is not set # CONFIG_POWER_LEGACY is not set # CONFIG_SPL_POWER_LEGACY is not set # CONFIG_ACPI_PMC is not set # CONFIG_SPL_ACPI_PMC is not set # CONFIG_TPL_ACPI_PMC is not set # # Power Domain Support # # CONFIG_POWER_DOMAIN is not set # CONFIG_DM_PMIC is not set # CONFIG_PMIC_TPS65217 is not set # CONFIG_POWER_MC34VR500 is not set # CONFIG_DM_REGULATOR is not set # CONFIG_POWER_MT6323 is not set # CONFIG_DM_PWM is not set # CONFIG_PWM_IMX is not set # CONFIG_PWM_SANDBOX is not set # CONFIG_U_QE is not set # CONFIG_RAM is not set # # Reboot Mode Support # # CONFIG_DM_REBOOT_MODE is not set # # Remote Processor drivers # # # Reset Controller Support # CONFIG_DM_RESET=y # CONFIG_RESET_AST2500 is not set # CONFIG_RESET_AST2600 is not set # CONFIG_RESET_HISILICON is not set # CONFIG_RESET_SYSCON is not set # CONFIG_RESET_SCMI is not set # CONFIG_RESET_DRA7 is not set # CONFIG_DM_RNG is not set # # Real Time Clock # # CONFIG_DM_RTC is not set # CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set # CONFIG_RTC_PCF8563 is not set # CONFIG_RTC_PL031 is not set # CONFIG_RTC_S35392A is not set # CONFIG_RTC_MC146818 is not set # CONFIG_RTC_M41T62 is not set # CONFIG_SCSI is not set # CONFIG_DM_SCSI is not set CONFIG_SERIAL=y CONFIG_BAUDRATE=115200 CONFIG_REQUIRE_SERIAL_CONSOLE=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_SERIAL_PRESENT=y CONFIG_CONS_INDEX=1 CONFIG_DM_SERIAL=y # CONFIG_SERIAL_RX_BUFFER is not set # CONFIG_SERIAL_PUTS is not set # CONFIG_SERIAL_SEARCH_ALL is not set # CONFIG_SERIAL_PROBE_ALL is not set # CONFIG_VPL_DM_SERIAL is not set # CONFIG_ALTERA_JTAG_UART is not set # CONFIG_ALTERA_UART is not set # CONFIG_ARC_SERIAL is not set # CONFIG_ARM_DCC is not set # CONFIG_ATMEL_USART is not set # CONFIG_BCM6345_SERIAL is not set # CONFIG_COREBOOT_SERIAL is not set # CONFIG_CORTINA_UART is not set # CONFIG_FSL_LINFLEXUART is not set # CONFIG_FSL_LPUART is not set # CONFIG_MVEBU_A3700_UART is not set # CONFIG_MCFUART is not set # CONFIG_NULLDEV_SERIAL is not set CONFIG_SYS_NS16550=y # CONFIG_NS16550_DYNAMIC is not set # CONFIG_PL01X_SERIAL is not set # CONFIG_ROCKCHIP_SERIAL is not set # CONFIG_XILINX_UARTLITE is not set # CONFIG_MSM_SERIAL is not set # CONFIG_MSM_GENI_SERIAL is not set # CONFIG_OMAP_SERIAL is not set # CONFIG_PXA_SERIAL is not set # CONFIG_SIFIVE_SERIAL is not set # CONFIG_ZYNQ_SERIAL is not set # CONFIG_MTK_SERIAL is not set # CONFIG_MT7620_SERIAL is not set # CONFIG_NPCM_SERIAL is not set # CONFIG_SMEM is not set # # Sound support # # CONFIG_SOUND is not set # # SOC (System On Chip) specific Drivers # # CONFIG_SOC_DEVICE is not set # CONFIG_SOC_TI is not set # CONFIG_SPI is not set # # SPMI support # # CONFIG_SPMI is not set # CONFIG_SYSINFO is not set # # System reset device drivers # # CONFIG_SYSRESET is not set # CONFIG_TEE is not set # CONFIG_DM_THERMAL is not set # # Timer Support # CONFIG_TIMER=y # CONFIG_TIMER_EARLY is not set # CONFIG_ALTERA_TIMER is not set # CONFIG_AST_TIMER is not set # CONFIG_ATCPIT100_TIMER is not set # CONFIG_ATMEL_PIT_TIMER is not set # CONFIG_CADENCE_TTC_TIMER is not set # CONFIG_DESIGNWARE_APB_TIMER is not set # CONFIG_MPC83XX_TIMER is not set # CONFIG_RENESAS_OSTM_TIMER is not set # CONFIG_NOMADIK_MTU_TIMER is not set # CONFIG_NPCM_TIMER is not set # CONFIG_OMAP_TIMER is not set # CONFIG_ROCKCHIP_TIMER is not set # CONFIG_STI_TIMER is not set # CONFIG_STM32_TIMER is not set # CONFIG_MTK_TIMER is not set # CONFIG_MCHP_PIT64B_TIMER is not set # CONFIG_IMX_GPT_TIMER is not set # # TPM support # # CONFIG_USB is not set # # UFS Host Controller Support # # CONFIG_TI_J721E_UFS is not set # # Graphics support # # CONFIG_DM_VIDEO is not set # CONFIG_SYS_WHITE_ON_BLACK is not set # CONFIG_NO_FB_CLEAR is not set # # TrueType Fonts # # CONFIG_VIDEO_VESA is not set # CONFIG_VIDEO_LCD_ANX9804 is not set # CONFIG_ATMEL_LCD_BGR555 is not set # CONFIG_VIDEO_BCM2835 is not set # CONFIG_VIDEO_LCD_SSD2828 is not set # CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set # CONFIG_VIDEO_MVEBU is not set # CONFIG_I2C_EDID is not set # CONFIG_DISPLAY is not set # CONFIG_ATMEL_HLCD is not set # CONFIG_AM335X_LCD is not set # CONFIG_VIDEO_TEGRA20 is not set # CONFIG_VIDEO_BRIDGE is not set # CONFIG_VIDEO is not set # CONFIG_LCD is not set # CONFIG_VIDEO_SIMPLE is not set # CONFIG_VIDEO_DT_SIMPLEFB is not set # CONFIG_OSD is not set # CONFIG_SPLASH_SCREEN is not set # CONFIG_VIDEO_VCXK is not set # # VirtIO Drivers # # CONFIG_VIRTIO_MMIO is not set # # 1-Wire support # # CONFIG_W1 is not set # # 1-wire EEPROM support # # CONFIG_W1_EEPROM is not set # # Watchdog Timer Support # CONFIG_WATCHDOG=y CONFIG_WATCHDOG_AUTOSTART=y CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 # CONFIG_IMX_WATCHDOG is not set # CONFIG_ULP_WATCHDOG is not set # CONFIG_DESIGNWARE_WATCHDOG is not set CONFIG_WDT=y # CONFIG_WDT_APPLE is not set # CONFIG_WDT_ASPEED is not set # CONFIG_WDT_AST2600 is not set # CONFIG_WDT_AT91 is not set # CONFIG_WDT_CDNS is not set # CONFIG_WDT_CORTINA is not set # CONFIG_WDT_GPIO is not set # CONFIG_WDT_MAX6370 is not set # CONFIG_WDT_ORION is not set # CONFIG_WDT_SBSA is not set # CONFIG_WDT_SP805 is not set # CONFIG_WDT_STM32MP is not set # CONFIG_XILINX_TB_WATCHDOG is not set # CONFIG_PVBLOCK is not set # CONFIG_PHYS_TO_BUS is not set # # File systems # # CONFIG_FS_BTRFS is not set # CONFIG_FS_CBFS is not set # CONFIG_SPL_FS_CBFS is not set # CONFIG_FS_EXT4 is not set # CONFIG_FS_FAT is not set # CONFIG_FS_JFFS2 is not set # CONFIG_UBIFS_SILENCE_MSG is not set # CONFIG_FS_CRAMFS is not set # CONFIG_YAFFS2 is not set # CONFIG_FS_SQUASHFS is not set # CONFIG_FS_EROFS is not set # # Library routines # # CONFIG_ADDR_MAP is not set # CONFIG_PHYSMEM is not set # CONFIG_BCH is not set # CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set CONFIG_CHARSET=y # CONFIG_DYNAMIC_CRC_TABLE is not set CONFIG_HAVE_PRIVATE_LIBGCC=y CONFIG_PRINTF=y CONFIG_SPRINTF=y CONFIG_STRTO=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_SYS_HZ=1000 # CONFIG_PANIC_HANG is not set # CONFIG_REGEX is not set CONFIG_LIB_RAND=y # CONFIG_LIB_HW_RAND is not set CONFIG_SUPPORT_ACPI=y # CONFIG_GENERATE_ACPI_TABLE is not set # CONFIG_SPL_TINY_MEMSET is not set # CONFIG_TPL_TINY_MEMSET is not set # CONFIG_BITREVERSE is not set # CONFIG_TRACE is not set # CONFIG_CIRCBUF is not set # CONFIG_CMD_DHRYSTONE is not set # # Security support # # CONFIG_AES is not set # CONFIG_ECDSA is not set # CONFIG_RSA is not set # CONFIG_TPM is not set # # Android Verified Boot # # # Hashing Support # # CONFIG_BLAKE2 is not set # CONFIG_SHA1 is not set # CONFIG_SHA256 is not set # CONFIG_SHA512 is not set # CONFIG_SHA384 is not set # CONFIG_SHA_HW_ACCEL is not set # CONFIG_MD5 is not set CONFIG_CRC32=y # # Compression Support # # CONFIG_LZ4 is not set # CONFIG_LZMA is not set # CONFIG_LZO is not set # CONFIG_GZIP is not set # CONFIG_ZLIB_UNCOMPRESS is not set # CONFIG_BZIP2 is not set CONFIG_ZLIB=y # CONFIG_ZSTD is not set # CONFIG_SPL_LZ4 is not set # CONFIG_SPL_LZMA is not set # CONFIG_VPL_LZMA is not set # CONFIG_SPL_LZO is not set # CONFIG_SPL_GZIP is not set # CONFIG_SPL_ZSTD is not set # CONFIG_ERRNO_STR is not set CONFIG_HEXDUMP=y # CONFIG_GETOPT is not set CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_ASSUME_MASK=0 CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_VPL_OF_LIBFDT is not set # CONFIG_FDT_FIXUP_PARTITIONS is not set # # System tables # # CONFIG_LIB_RATIONAL is not set # CONFIG_SMBIOS_PARSER is not set # CONFIG_EFI_LOADER is not set # CONFIG_OPTEE_LIB is not set # CONFIG_OPTEE_IMAGE is not set # CONFIG_BOOTM_OPTEE is not set # CONFIG_TEST_FDTDEC is not set # CONFIG_PHANDLE_CHECK_SEQ is not set # CONFIG_UNIT_TEST is not set # CONFIG_SPL_UNIT_TEST is not set # # Tools options # CONFIG_MKIMAGE_DTC_PATH="dtc" # CONFIG_TOOLS_MKEFICAPSULE is not set 根据以上代码,其中,CONFIG_ENV_OFFSET_REDUND=0x280000表示什么?
08-02
int dec_cnk(DEC_CTX * ctx, COM_BITB * bitb, DEC_STAT * stat) { COM_BSR *bs; COM_PIC_HEADER *pic_header; COM_SQH * sqh; #if SVAC_SECURITY_PARAM_SET COM_SEC_PARA_SET* sec_para_set; #endif #if SVAC_AUTHENTICATION COM_AUTH_DATA* auth_data; #endif #if HLS_OPT_PPS COM_PIC_PARA_SET * pps; #endif COM_SH_EXT *shext; COM_CNKH *cnkh; int ret = COM_OK; if (stat) { com_mset(stat, 0, sizeof(DEC_STAT)); } bs = &ctx->bs; sqh = &ctx->info.sqh; #if HLS_OPT_PPS pps = &ctx->info.pps[ctx->info.pps_count]; #endif pic_header = &ctx->info.pic_header; shext = &ctx->info.shext; cnkh = &ctx->info.cnkh; #if SVAC_SECURITY_PARAM_SET sec_para_set = &ctx->info.sec_para_set; #endif #if SVAC_AUTHENTICATION auth_data = &ctx->info.auth_data; #endif /* set error status */ ctx->bs_err = (u8)bitb->err; #if TRACE_RDO_EXCLUDE_I if (pic_header->slice_type != SLICE_I) { #endif COM_TRACE_SET(1); #if TRACE_RDO_EXCLUDE_I } else { COM_TRACE_SET(0); } #endif /* bitstream reader initialization */ com_bsr_init(bs, bitb->addr, bitb->ssize, NULL); SET_SBAC_DEC(bs, &ctx->sbac_dec); #if SVAC_NAL if (bs->cur[3] == SVAC_SPS) #else if (bs->cur[3] == 0xB0) #endif { #if LIB_PIC_MIXBIN int need_update = COM_CT_CRR_SLICE == cnkh->ctype || COM_CT_CRR_SLICE_IMCOPLETE == cnkh->ctype #if SVAC_SECURITY_PARAM_SET || cnkh->ctype == COM_CT_SEC_PARA_SET #endif ; #endif #if HLS_OPT_PPS ctx->info.pps_count = 0; memset(ctx->info.pps, 0, sizeof(ctx->info.pps)); #endif cnkh->ctype = COM_CT_SQH; ret = dec_eco_sqh(bs, sqh); com_assert_rv(COM_SUCCEEDED(ret), ret); #if LIBVC_ON ctx->dpm.libvc_data->is_libpic_processing = sqh->library_stream_flag; ctx->dpm.libvc_data->library_picture_enable_flag = sqh->library_picture_enable_flag; #if LIBPIC_DISPLAY ctx->dpm.libvc_data->libpic_mode_index = sqh->library_picture_mode_index; #endif #endif #if EXTENSION_USER_DATA extension_and_user_data(ctx, bs, 0, sqh, pic_header); #endif #if LIB_PIC_MIXBIN if (sqh->library_stream_flag) { if (!ctx->libpic_init_flag) { ret = sequence_init(ctx, sqh); com_assert_rv(COM_SUCCEEDED(ret), ret); #if MULTI_LAYER_FRAMEWORK g_DOIPrev[ctx->layer_id] = g_CountDOICyCleTime[ctx->layer_id] = 0; #else g_DOIPrev = g_CountDOICyCleTime = 0; #endif ctx->libpic_init_flag = 1; ctx->init_flag = 1; } } else #endif if( !ctx->init_flag ) { ret = sequence_init(ctx, sqh); com_assert_rv(COM_SUCCEEDED(ret), ret); #if MULTI_LAYER_FRAMEWORK g_DOIPrev[ctx->layer_id] = g_CountDOICyCleTime[ctx->layer_id] = 0; #else g_DOIPrev = g_CountDOICyCleTime = 0; #endif ctx->init_flag = 1; } #if LIB_PIC_MIXBIN if (sqh->library_stream_flag && sqh->library_picture_mixbin_flag) { memcpy(&ctx->info.libpic_sqh, sqh, sizeof(COM_SQH)); ret = sequence_init(ctx, sqh); com_assert_rv(COM_SUCCEEDED(ret), ret); } else { memcpy(&ctx->info.normal_sqh, sqh, sizeof(COM_SQH)); if (need_update) { ret = sequence_init(ctx, sqh); com_assert_rv(COM_SUCCEEDED(ret), ret); } } #endif } #if !SVAC_NAL else if( bs->cur[3] == 0xB1 ) { ctx->init_flag = 0; cnkh->ctype = COM_CT_SEQ_END; } #endif #if HLS_OPT_PPS else if (bs->cur[3] == SVAC_PPS) { cnkh->ctype = COM_CT_PPS; ret = dec_eco_pps(bs, sqh, pps); ctx->info.pps_count++; assert(ctx->info.pps_count <= MAX_PPS_NUM); com_assert_rv(COM_SUCCEEDED(ret), ret); #if LIB_PIC_MIXBIN if (sqh->library_stream_flag) ctx->info.libpic_pps_idx = ctx->info.pps_count - 1; else ctx->info.normal_pps_idx = ctx->info.pps_count - 1; #endif } #endif #if SVAC_NAL #if HLS_OPT_PPS else if (bs->cur[3] == SVAC_PH) #else else if (bs->cur[3] == SVAC_PPS) #endif #else else if (bs->cur[3] == 0xB3 || bs->cur[3] == 0xB6) #endif { #if MULTI_LAYER_FRAMEWORK if (ctx->layer_id) { if (!ctx->init_flag) { ret = sequence_init(ctx, sqh); com_assert_rv(COM_SUCCEEDED(ret), ret); g_DOIPrev[ctx->layer_id] = g_CountDOICyCleTime[ctx->layer_id] = 0; ctx->init_flag = 1; if (ctx->layer_id && !sqh->sps_independent_layer_flag[ctx->layer_id]) { COM_PM* pm = &(ctx->dpm); int size; pm->pic_tmp[0] = com_pic_alloc(&pm->pa, &ret); pm->pic_tmp[1] = com_pic_alloc(&pm->pa, &ret); size = sizeof(s8) * ctx->info.f_scu * REFP_NUM; memset(pm->pic_tmp[0]->map_refi, -1, size); size = sizeof(s16) * ctx->info.f_scu * REFP_NUM * MV_D; memset(pm->pic_tmp[0]->map_mv, 0, size); #if CU_LEVEL_PRIVACY size = sizeof(u8) * ctx->info.f_scu; memset(pm->pic_tmp[0]->map_privacy, 0, size); #endif } } } #endif #if LIB_PIC_MIXBIN if (COM_CT_CRR_SLICE == cnkh->ctype || COM_CT_CRR_SLICE_IMCOPLETE == cnkh->ctype) { assert(sqh->library_picture_mixbin_flag == 1); memcpy(sqh, &ctx->info.normal_sqh, sizeof(COM_SQH)); ret = sequence_init(ctx, sqh); com_assert_rv(COM_SUCCEEDED(ret), ret); #if HLS_OPT_PPS pps = &ctx->info.pps[ctx->info.normal_pps_idx]; #endif ctx->dpm.libvc_data->is_libpic_processing = sqh->library_stream_flag; ctx->dpm.libvc_data->library_picture_enable_flag = sqh->library_picture_enable_flag; } #endif cnkh->ctype = COM_CT_PICTURE; /* decode slice header */ pic_header->low_delay = sqh->low_delay; int need_minus_256 = 0; #if HLS_OPT_PPS ret = dec_eco_pic_header(bs, ctx, &need_minus_256); #if MULTI_LAYER_FRAMEWORK assert(ctx->layer_id == pic_header->layer_id); if (ctx->layer_id && !sqh->sps_independent_layer_flag[ctx->layer_id] ) { DEC_CTX* ctx_b = (DEC_CTX*)ctx->ctx_b; upsample_base_pic(&ctx->dpm, ctx_b->pic, &ctx_b->info, &ctx->info, ctx_b->layer_id, ctx->layer_id); add_pic(&ctx_b->dpm, &ctx->dpm, ctx_b->pic, ctx_b->layer_id, &ctx_b->info, &ctx->info, ctx_b->info.pic_header.decode_order_index, ctx_b->ptr, ctx->refp, ctx->info.sqh.ref_layer_id[ctx->layer_id], ctx_b->info.poc); } #endif #else ret = dec_eco_pic_header(bs, pic_header, sqh, &need_minus_256); #endif if (need_minus_256) { com_picman_dpbpic_doi_minus_cycle_length( &ctx->dpm ); } #if HLS_OPT_PPS ctx->wq[0] = ctx->info.pps[pic_header->pic_pps_id].wq_4x4_matrix; ctx->wq[1] = ctx->info.pps[pic_header->pic_pps_id].wq_8x8_matrix; #else ctx->wq[0] = pic_header->wq_4x4_matrix; ctx->wq[1] = pic_header->wq_8x8_matrix; #endif if (!sqh->library_stream_flag) { com_picman_check_repeat_doi(&ctx->dpm, pic_header); } #if LIB_PIC_MIXBIN if (sqh->library_stream_flag && sqh->library_picture_mixbin_flag) { memcpy(&ctx->info.libpic_pic_header, pic_header, sizeof(COM_PIC_HEADER)); memcpy(ctx->libpic_pic_esao_params, ctx->info.pic_header.pic_esao_params, N_C * sizeof(ESAO_BLK_PARAM)); memcpy(ctx->libpic_pic_ccsao_params, ctx->info.pic_header.pic_ccsao_params, (N_C - 1) * sizeof(CCSAO_BLK_PARAM)); for (int comp_idx = 0; comp_idx < N_C; comp_idx++) { #if ALF_SHAPE int num_coef = (ctx->info.sqh.adaptive_leveling_filter_enhance_flag) ? ALF_MAX_NUM_COEF_SHAPE2 : ALF_MAX_NUM_COEF; #endif copy_alf_param(ctx->dec_alf->libpic_alf_picture_param[comp_idx], ctx->dec_alf->alf_picture_param[comp_idx] #if ALF_SHAPE , num_coef #if ALF_SHIFT + (int)ctx->info.sqh.adaptive_leveling_filter_enhance_flag #endif #endif ); } } #endif #if LIBPIC_DISPLAY ctx->dpm.libvc_data->libpic_index = pic_header->library_picture_index; #endif #if HIGH_LEVEL_PRIVACY memset(ctx->ctx_privacy_data.region_max_num, 0, sizeof(int) * 10); #endif #if EXTENSION_USER_DATA && WRITE_MD5_IN_USER_DATA extension_and_user_data(ctx, bs, 1, sqh, pic_header); #endif com_constrcut_ref_list_doi(pic_header); //add by Yuqun Fan, init rpl list at ph instead of sh #if HLS_RPL #if LIBVC_ON if (!sqh->library_stream_flag) #endif { ret = com_picman_refpic_marking_decoder(&ctx->dpm, pic_header); com_assert_rv(ret == COM_OK, ret); } com_cleanup_useless_pic_buffer_in_pm(&ctx->dpm); /* reference picture lists construction */ ret = com_picman_refp_rpl_based_init_decoder(&ctx->dpm, pic_header, ctx->refp); #if AWP if (ctx->info.pic_header.slice_type == SLICE_P || ctx->info.pic_header.slice_type == SLICE_B) { for (int i = 0; i < ctx->dpm.num_refp[REFP_0]; i++) { ctx->info.pic_header.ph_poc[REFP_0][i] = ctx->refp[i][REFP_0].ptr; } } if (ctx->info.pic_header.slice_type == SLICE_B) { for (int i = 0; i < ctx->dpm.num_refp[REFP_1]; i++) { ctx->info.pic_header.ph_poc[REFP_1][i] = ctx->refp[i][REFP_1].ptr; } } #endif #endif com_assert_rv(COM_SUCCEEDED(ret), ret); } #if SVAC_NAL else if ((bs->cur[3] == SVAC_IDR || bs->cur[3] == SVAC_NON_RAP || bs->cur[3] == SVAC_RAP_I #if LIB_PIC_MIXBIN || bs->cur[3] == SVAC_CRR_L || bs->cur[3] == SVAC_CRR_RL #if DISPLAY_L_NAL_TYPE || bs->cur[3] == SVAC_CRR_DP #endif #if LIB_PIC_ERR_TOL || bs->cur[3] == SVAC_CRR_DL #endif #endif ) && bs->cur[4] <= 0x8E) #else else if (bs->cur[3] >= 0x00 && bs->cur[3] <= 0x8E) #endif { #if LIB_PIC_MIXBIN #if DISPLAY_L_NAL_TYPE if (!sqh->library_stream_flag && (bs->cur[3] == SVAC_CRR_L || bs->cur[3] == SVAC_CRR_DP #if LIB_PIC_ERR_TOL || bs->cur[3] == SVAC_CRR_DL #endif )) #else if (!sqh->library_stream_flag && bs->cur[3] == SVAC_CRR_L) #endif { assert(sqh->library_picture_mixbin_flag == 1); memcpy(sqh, &ctx->info.libpic_sqh, sizeof(COM_SQH)); ret = sequence_init(ctx, sqh); com_assert_rv(COM_SUCCEEDED(ret), ret); #if HLS_OPT_PPS pps = &ctx->info.pps[ctx->info.libpic_pps_idx]; #endif ctx->dpm.libvc_data->is_libpic_processing = sqh->library_stream_flag; ctx->dpm.libvc_data->library_picture_enable_flag = sqh->library_picture_enable_flag; memcpy(pic_header, &ctx->info.libpic_pic_header, sizeof(COM_PIC_HEADER)); memcpy(pic_header->pic_esao_params, ctx->libpic_pic_esao_params, N_C * sizeof(ESAO_BLK_PARAM)); memcpy(pic_header->pic_ccsao_params, ctx->libpic_pic_ccsao_params, (N_C - 1) * sizeof(CCSAO_BLK_PARAM)); memcpy(ctx->pic_alf_on, ctx->libpic_pic_alf_on, N_C * sizeof(int)); for (int comp_idx = 0; comp_idx < N_C; comp_idx++) { #if ALF_SHAPE int num_coef = (ctx->info.sqh.adaptive_leveling_filter_enhance_flag) ? ALF_MAX_NUM_COEF_SHAPE2 : ALF_MAX_NUM_COEF; #endif copy_alf_param(ctx->dec_alf->alf_picture_param[comp_idx], ctx->dec_alf->libpic_alf_picture_param[comp_idx] #if ALF_SHAPE , num_coef #if ALF_SHIFT + (int)ctx->info.sqh.adaptive_leveling_filter_enhance_flag #endif #endif ); memcpy(ctx->info.pic_header.pic_esao_params[comp_idx].lcu_flag, ctx->libpic_esao_lcu_flag[comp_idx], ctx->info.f_lcu * sizeof(int)); if (comp_idx) memcpy(ctx->info.pic_header.pic_ccsao_params[comp_idx - 1].lcu_flag, ctx->libpic_ccsao_lcu_flag[comp_idx - 1], ctx->info.f_lcu * sizeof(int)); } for (int lcu_idx = 0; lcu_idx < ctx->info.f_lcu; lcu_idx++) { copy_sao_param_for_blk(ctx->sao_blk_params[lcu_idx], ctx->libpic_sao_blk_params[lcu_idx]); copy_sao_param_for_blk(ctx->rec_sao_blk_params[lcu_idx], ctx->libpic_rec_sao_blk_params[lcu_idx]); memcpy(ctx->dec_alf->alf_lcu_enabled[lcu_idx], ctx->dec_alf->libpic_alf_lcu_enabled[lcu_idx], N_C * sizeof(int)); } memcpy(ctx->map.map_pb_tb_part, ctx->map.libpic_map_pb_tb_part, ctx->info.f_scu * sizeof(u32)); memcpy(ctx->map.map_patch_idx, ctx->map.libpic_map_patch_idx, ctx->info.f_scu * sizeof(s8)); memcpy(ctx->map.map_split, ctx->map.libpic_map_split, ctx->info.f_lcu * sizeof(s8)* MAX_CU_DEPTH* NUM_BLOCK_SHAPE* MAX_CU_CNT_IN_LCU); mCabac_ws = MCABAC_SHIFT_I; mCabac_offset = (1 << (mCabac_ws - 1)); counter_thr1 = 0; counter_thr2 = COUNTER_THR_I; #if HLS_OPT_PPS ctx->wq[0] = ctx->info.pps[pic_header->pic_pps_id].wq_4x4_matrix; ctx->wq[1] = ctx->info.pps[pic_header->pic_pps_id].wq_8x8_matrix; #else ctx->wq[0] = pic_header->wq_4x4_matrix; ctx->wq[1] = pic_header->wq_8x8_matrix; #endif } #if DISPLAY_L_NAL_TYPE if (sqh->library_stream_flag && (bs->cur[3] != SVAC_CRR_L && bs->cur[3] != SVAC_CRR_DP #if LIB_PIC_ERR_TOL && bs->cur[3] != SVAC_CRR_DL #endif )) #else if (sqh->library_stream_flag && bs->cur[3] != SVAC_CRR_L) #endif { assert(sqh->library_picture_mixbin_flag == 1); memcpy(sqh, &ctx->info.normal_sqh, sizeof(COM_SQH)); ret = sequence_init(ctx, sqh); com_assert_rv(COM_SUCCEEDED(ret), ret); #if HLS_OPT_PPS pps = &ctx->info.pps[ctx->info.normal_pps_idx ]; #endif ctx->dpm.libvc_data->is_libpic_processing = sqh->library_stream_flag; ctx->dpm.libvc_data->library_picture_enable_flag = sqh->library_picture_enable_flag; } #if LIBPIC_DISPLAY int is_patch_l = sqh->library_stream_flag && sqh->library_picture_mixbin_flag && ctx->info.sqh.library_picture_mode_index != 1; #else int is_patch_l = sqh->library_stream_flag && sqh->library_picture_mixbin_flag; #endif #endif cnkh->ctype = COM_CT_SLICE; #if SVAC_NAL if (bs->cur[3] == SVAC_IDR) picman_reset_dpb(&ctx->dpm); #endif #if CU_LEVEL_PRIVACY COM_BSR *bs_privacy = &ctx->bs_privacy; com_bsr_init(bs_privacy, bitb->addr2, bitb->ssize2, NULL); SET_SBAC_DEC(bs_privacy, &ctx->sbac_dec_privacy); if (ctx->user_permission && ctx->info.pic_header.ph_privacy_on) { while (com_bsr_next(bs_privacy, 24) != 0x1) { ret = com_bsr_read(bs_privacy, 8); }; unsigned int nalu_type = 0, temporal_id = 0, layer_id = 0; dec_eco_nalu_header(bs_privacy, &nalu_type, &temporal_id, &layer_id); assert(nalu_type == SVAC_PRIVACY); #if TSVC_OPT assert(temporal_id == ctx->info.pic_header.temporal_id); #endif #if MULTI_LAYER_FRAMEWORK assert(layer_id == ctx->info.pic_header.layer_id); #endif } #endif #if HLS_OPT_PPS ret = dec_eco_patch_header(bs, sqh, &ctx->info.pps[pic_header->pic_pps_id], pic_header, shext, ctx->patch); #else ret = dec_eco_patch_header(bs, sqh, pic_header, shext, ctx->patch); #endif #if LIB_PIC_MIXBIN if (is_patch_l && ctx->patch->idx + 1 < ctx->patch->rows * ctx->patch->columns) cnkh->ctype = COM_CT_CRR_SLICE_IMCOPLETE; #if LIBPIC_DISPLAY else if (is_patch_l || (sqh->library_stream_flag && ctx->info.sqh.library_picture_mode_index == 1)) #else else if (is_patch_l) #endif cnkh->ctype = COM_CT_CRR_SLICE; #endif /* initialize slice */ ret = slice_init(ctx, ctx->core, pic_header); com_assert_rv(COM_SUCCEEDED(ret), ret); #if LIB_PIC_MIXBIN if (is_patch_l && ctx->patch->idx != 0) { ctx->pic = ctx->libpic_pic; } else { #endif /* get available frame buffer for decoded image */ ctx->pic = com_picman_get_empty_pic(&ctx->dpm, &ret); com_assert_rv(ctx->pic, ret); #if LIB_PIC_MIXBIN if (is_patch_l && ctx->patch->idx == 0) ctx->libpic_pic = ctx->pic; } #endif /* get available frame buffer for decoded image */ ctx->map.map_refi = ctx->pic->map_refi; ctx->map.map_mv = ctx->pic->map_mv; #if CU_LEVEL_PRIVACY ctx->map.map_privacy = ctx->pic->map_privacy; #endif #if CU_LEVEL_PRIVACY com_mset_x64a(ctx->map.map_privacy_pic_filter[0], 0, sizeof(COM_FILTER_SKIP)* ctx->info.pic_width* ctx->info.pic_height); com_mset_x64a(ctx->map.map_privacy_pic_filter[1], 0, sizeof(COM_FILTER_SKIP)* ctx->info.pic_width* ctx->info.pic_height); #endif /* decode slice layer */ #if HLS_OPT_PPS ret = dec_pic(ctx, ctx->core, sqh, &ctx->info.pps[pic_header->pic_pps_id], pic_header, shext); #else ret = dec_pic(ctx, ctx->core, sqh, pic_header, shext); #endif com_assert_rv(COM_SUCCEEDED(ret), ret); #if LIB_PIC_MIXBIN if (!is_patch_l || (is_patch_l && ctx->patch->idx + 1 == ctx->patch->rows * ctx->patch->columns)) { #endif /* deblocking filter */ #if HLS_OPT_PPS if (ctx->info.pps[ctx->info.pic_header.pic_pps_id].loop_filter_disable_flag == 0) #else if (ctx->info.pic_header.loop_filter_disable_flag == 0) #endif { ret = dec_deblock_avs2(ctx); com_assert_rv(COM_SUCCEEDED(ret), ret); } #if CCSAO if (ctx->info.pic_header.pic_ccsao_on[U_C-1] || ctx->info.pic_header.pic_ccsao_on[V_C-1]) { #if CCSAO_ENHANCEMENT copy_frame_for_ccsao(ctx->pic_ccsao[0], ctx->pic, Y_C); copy_frame_for_ccsao(ctx->pic_ccsao[0], ctx->pic, U_C); copy_frame_for_ccsao(ctx->pic_ccsao[0], ctx->pic, V_C); #else copy_frame_for_ccsao(ctx->pic_ccsao, ctx->pic, Y_C); #endif } #endif /* sao filter */ if (ctx->info.sqh.sample_adaptive_offset_enable_flag) { ret = dec_sao_avs2(ctx); com_assert_rv(ret == COM_OK, ret); } /* esao filter */ #if ESAO if (ctx->info.sqh.esao_enable_flag) { ret = dec_esao(ctx); com_assert_rv(ret == COM_OK, ret); } #endif #if CCSAO /* ccsao filter */ if (ctx->info.sqh.ccsao_enable_flag) { ret = dec_ccsao(ctx); com_assert_rv(ret == COM_OK, ret); } #endif /* ALF */ if (ctx->info.sqh.adaptive_leveling_filter_enable_flag) { ret = dec_alf_avs2(ctx, ctx->pic); com_assert_rv(COM_SUCCEEDED(ret), ret); } /* MD5 check for testing encoder-decoder match*/ if (ctx->use_pic_sign && ctx->pic_sign_exist) { ret = dec_picbuf_check_signature(ctx->pic, ctx->pic_sign #if CU_LEVEL_PRIVACY , ctx->user_permission || !ctx->info.pic_header.ph_privacy_on #endif ); com_assert_rv(COM_SUCCEEDED(ret), ret); ctx->pic_sign_exist = 0; /* reset flag */ } #if SVAC_UD_MD5_STREAM extension_and_user_data(ctx, bs, 1, sqh, pic_header); if (ctx->use_pic_sign && ctx->stream_sign_exist) { ctx->stream_sign_check_flag = 1; unsigned char * concat_buf = malloc((1024 * 1024 * 32)); com_assert_rv(concat_buf != NULL, -1); unsigned int stream_size = (unsigned int)((u8 *)bitb->addr3 - (u8 *)bitb->addr3_beg); u8 * stream_p = bitb->addr3_beg; unsigned char * buffer_p = concat_buf; while ((stream_p - (u8 *)bitb->addr3_beg) < stream_size) { unsigned int nal_size = 1; while (!(stream_p[nal_size + 0] == 0x00 && stream_p[nal_size + 1] == 0x00 && stream_p[nal_size + 2] == 0x00 && stream_p[nal_size + 3] == 0x01) && !(stream_p[nal_size + 0] == 0x00 && stream_p[nal_size + 1] == 0x00 && stream_p[nal_size + 2] == 0x01 && stream_p[nal_size - 1] != 0)) { if (!((stream_p - (u8 *)bitb->addr3_beg) < stream_size - nal_size - 4)) { nal_size += 4; break; } nal_size++; } if (stream_p[4] != (0x0c) && stream_p[3] != (0x0c) //sei && stream_p[4] != (0x20) && stream_p[3] != (0x20) //eocvs && stream_p[4] != (0x16) && stream_p[3] != (0x16) //eos #if SVAC_SECURITY_PARAM_SET && stream_p[4] != (0x52) && stream_p[3] != (0x52) //sec #endif #if SVAC_AUTHENTICATION && stream_p[4] != (0x14) && stream_p[3] != (0x14) //auth #endif ) { int start_code_len = 4; if (stream_p[0] == 0x00 && stream_p[1] == 0x00 && stream_p[2] == 0x01) { start_code_len = 3; } unsigned int raw_nal_size = nal_size - start_code_len; memcpy(buffer_p, stream_p + start_code_len, raw_nal_size); buffer_p += raw_nal_size; } stream_p += nal_size; } int stream_total_size = (int)(buffer_p - concat_buf); u8 stream_sign[16]; int ret = com_md5_stream(concat_buf, stream_total_size, stream_sign); com_assert_rv(COM_SUCCEEDED(ret), ret); if (com_mcmp(ctx->stream_sign, stream_sign, 16) != 0) { printf("\n stream signature check failed \n"); } com_assert_rv(com_mcmp(ctx->stream_sign, stream_sign, 16) == 0, COM_ERR_BAD_CRC); ctx->stream_sign_exist = 0; /* reset flag */ if (concat_buf) free(concat_buf); } bitb->addr3 = bitb->addr3_beg; #endif #if PIC_PAD_SIZE_L > 0 /* expand pixels to padding area */ dec_picbuf_expand(ctx, ctx->pic); #endif #if LIB_PIC_MIXBIN } if (is_patch_l) { memcpy(ctx->libpic_pic_alf_on, ctx->pic_alf_on, N_C * sizeof(int)); for (int lcu_idx = 0; lcu_idx < ctx->info.f_lcu; lcu_idx++) { copy_sao_param_for_blk(ctx->libpic_sao_blk_params[lcu_idx], ctx->sao_blk_params[lcu_idx]); copy_sao_param_for_blk(ctx->libpic_rec_sao_blk_params[lcu_idx], ctx->rec_sao_blk_params[lcu_idx]); memcpy(ctx->dec_alf->libpic_alf_lcu_enabled[lcu_idx], ctx->dec_alf->alf_lcu_enabled[lcu_idx], N_C * sizeof(int)); } for (int comp_idx = 0; comp_idx < N_C; comp_idx++) { memcpy(ctx->libpic_esao_lcu_flag[comp_idx], ctx->info.pic_header.pic_esao_params[comp_idx].lcu_flag, ctx->info.f_lcu * sizeof(int)); if (comp_idx) memcpy(ctx->libpic_ccsao_lcu_flag[comp_idx - 1], ctx->info.pic_header.pic_ccsao_params[comp_idx - 1].lcu_flag, ctx->info.f_lcu * sizeof(int)); } } #endif /* put decoded picture to DPB */ #if LIBVC_ON if (sqh->library_stream_flag #if LIB_PIC_MIXBIN && (!is_patch_l || (is_patch_l && (ctx->patch->idx + 1) == ctx->patch->rows * ctx->patch->columns)) #endif ) { ret = com_picman_put_libpic(&ctx->dpm, ctx->pic, ctx->info.pic_header.slice_type, ctx->ptr, pic_header->decode_order_index, ctx->info.pic_header.temporal_id, 1, ctx->refp, pic_header #if HLS_OPT_PPS , pps #endif ); } else #if LIB_PIC_MIXBIN if (!sqh->library_stream_flag) #endif #endif { ret = com_picman_put_pic(&ctx->dpm, ctx->pic, ctx->info.pic_header.slice_type, ctx->ptr, pic_header->decode_order_index , pic_header->picture_output_delay, ctx->info.pic_header.temporal_id, 1, ctx->refp #if OBMC #if CUDQP , pic_header #else , pic_header->picture_qp #endif #if HLS_OPT_PPS , pps #endif #endif ); #if LIBVC_ON assert((&ctx->dpm)->cur_pb_size + (&ctx->dpm)->cur_libpb_size <= sqh->max_dpb_size); #else assert((&ctx->dpm)->cur_pb_size <= sqh->max_dpb_size); #endif } com_assert_rv(COM_SUCCEEDED(ret), ret); } #if SVAC_NAL else if (bs->cur[3] == SVAC_EOS) { ctx->init_flag = 0; ctx->libpic_init_flag = 0; cnkh->ctype = COM_CT_SEQ_END; } else if (bs->cur[3] == SVAC_EOCVS) { ctx->init_flag = 0; ctx->libpic_init_flag = 0; cnkh->ctype = COM_CT_CVS_END; } #endif #if SVAC_SECURITY_PARAM_SET else if (bs->cur[3] == SVAC_SEC_PS) { dec_eco_sec_parameter_set_init(ctx, bs, pic_header, sec_para_set); ret = dec_eco_sec_parameter_set(ctx, bs, pic_header, sec_para_set); com_assert_rv(COM_SUCCEEDED(ret), ret); cnkh->ctype = COM_CT_SEC_PARA_SET; } #endif #if SVAC_AUTHENTICATION else if (bs->cur[3] == SVAC_AUTH_DATA) { dec_eco_auth_data_init(ctx, bs, pic_header, auth_data); ret = dec_eco_auth_data(ctx, bs, pic_header, auth_data); com_assert_rv(COM_SUCCEEDED(ret), ret); cnkh->ctype = COM_CT_AUTH; } #endif else { return COM_ERR_MALFORMED_BITSTREAM; } make_stat(ctx, cnkh->ctype, stat); return ret; }
07-16
android / platform / frameworks / support / 4d53400eca9f3ac90c3a3f6cffcbc5bf492ec536 / . / window / window / src / main / java / androidx / window / embedding / SplitRule.kt blob: 75d2af5b162188e2b485d18a8ebc9d20e6c2e1c1 [file] [log] [blame] /* * Copyright 2021 The Android Open Source Project * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. */ package androidx.window.embedding import android.content.Context import android.graphics.Rect import android.os.Build import android.view.WindowMetrics import androidx.annotation.DoNotInline import androidx.annotation.IntRange import androidx.annotation.RequiresApi import androidx.core.util.Preconditions import androidx.window.embedding.EmbeddingAspectRatio.Companion.ALWAYS_ALLOW import androidx.window.embedding.EmbeddingAspectRatio.Companion.ratio import androidx.window.embedding.SplitRule.Companion.SPLIT_MAX_ASPECT_RATIO_LANDSCAPE_DEFAULT import androidx.window.embedding.SplitRule.Companion.SPLIT_MAX_ASPECT_RATIO_PORTRAIT_DEFAULT import androidx.window.embedding.SplitRule.Companion.SPLIT_MIN_DIMENSION_ALWAYS_ALLOW import androidx.window.embedding.SplitRule.Companion.SPLIT_MIN_DIMENSION_DP_DEFAULT import androidx.window.embedding.SplitRule.FinishBehavior.Companion.ADJACENT import kotlin.math.min /** * Split configuration rules for activities that are launched to side in a split. * Define the visual properties of the split. Can be set either via [RuleController.setRules] or * via [RuleController.addRule]. The rules are always applied only to activities that will be * started after the rules were set. * * Note that regardless of whether the minimal requirements ([minWidthDp], [minHeightDp] and * [minSmallestWidthDp]) are met or not, the callback set in * [SplitController.setSplitAttributesCalculator] will still be called for the rule if the * calculator is registered via [SplitController.setSplitAttributesCalculator]. * Whether this [SplitRule]'s minimum requirements are satisfied is dispatched in * [SplitAttributesCalculatorParams.areDefaultConstraintsSatisfied] instead. * The width and height could be verified in the [SplitAttributes] calculator callback * as the sample linked below shows. * * It is useful if this [SplitRule] is supported to split the parent container in different * directions with different device states. * * @sample androidx.window.samples.embedding.splitWithOrientations * @see androidx.window.embedding.SplitPairRule * @see androidx.window.embedding.SplitPlaceholderRule */ open class SplitRule internal constructor( tag: String? = null, /** * The smallest value of width of the parent task window when the split should be used, in DP. * When the window size is smaller than requested here, activities in the secondary container * will be stacked on top of the activities in the primary one, completely overlapping them. * * The default is [SPLIT_MIN_DIMENSION_DP_DEFAULT] if the app doesn't set. * [SPLIT_MIN_DIMENSION_ALWAYS_ALLOW] means to always allow split. */ @IntRange(from = 0) val minWidthDp: Int = SPLIT_MIN_DIMENSION_DP_DEFAULT, /** * The smallest value of height of the parent task window when the split should be used, in DP. * When the window size is smaller than requested here, activities in the secondary container * will be stacked on top of the activities in the primary one, completely overlapping them. * It is useful if it's necessary to split the parent window horizontally for this [SplitRule]. * * The default is [SPLIT_MIN_DIMENSION_DP_DEFAULT] if the app doesn't set. * [SPLIT_MIN_DIMENSION_ALWAYS_ALLOW] means to always allow split. * * @see SplitAttributes.LayoutDirection.TOP_TO_BOTTOM * @see SplitAttributes.LayoutDirection.BOTTOM_TO_TOP */ @IntRange(from = 0) val minHeightDp: Int = SPLIT_MIN_DIMENSION_DP_DEFAULT, /** * The smallest value of the smallest possible width of the parent task window in any rotation * when the split should be used, in DP. When the window size is smaller than requested here, * activities in the secondary container will be stacked on top of the activities in the primary * one, completely overlapping them. * * The default is [SPLIT_MIN_DIMENSION_DP_DEFAULT] if the app doesn't set. * [SPLIT_MIN_DIMENSION_ALWAYS_ALLOW] means to always allow split. */ @IntRange(from = 0) val minSmallestWidthDp: Int = SPLIT_MIN_DIMENSION_DP_DEFAULT, /** * The largest value of the aspect ratio, expressed as `height / width` in decimal form, of the * parent window bounds in portrait when the split should be used. When the window aspect ratio * is greater than requested here, activities in the secondary container will be stacked on top * of the activities in the primary one, completely overlapping them. * * This value is only used when the parent window is in portrait (height >= width). * * The default is [SPLIT_MAX_ASPECT_RATIO_PORTRAIT_DEFAULT], which is the recommend value to * only allow split when the parent window is not too stretched in portrait. * * @see EmbeddingAspectRatio.ratio * @see EmbeddingAspectRatio.ALWAYS_ALLOW * @see EmbeddingAspectRatio.ALWAYS_DISALLOW */ val maxAspectRatioInPortrait: EmbeddingAspectRatio = SPLIT_MAX_ASPECT_RATIO_PORTRAIT_DEFAULT, /** * The largest value of the aspect ratio, expressed as `width / height` in decimal form, of the * parent window bounds in landscape when the split should be used. When the window aspect ratio * is greater than requested here, activities in the secondary container will be stacked on top * of the activities in the primary one, completely overlapping them. * * This value is only used when the parent window is in landscape (width > height). * * The default is [SPLIT_MAX_ASPECT_RATIO_LANDSCAPE_DEFAULT], which is the recommend value to * always allow split when the parent window is in landscape. * * @see EmbeddingAspectRatio.ratio * @see EmbeddingAspectRatio.ALWAYS_ALLOW * @see EmbeddingAspectRatio.ALWAYS_DISALLOW */ val maxAspectRatioInLandscape: EmbeddingAspectRatio = SPLIT_MAX_ASPECT_RATIO_LANDSCAPE_DEFAULT, /** * The default [SplitAttributes] to apply on the activity containers pair when the host task * bounds satisfy [minWidthDp], [minHeightDp], [minSmallestWidthDp], * [maxAspectRatioInPortrait] and [maxAspectRatioInLandscape] requirements. */ val defaultSplitAttributes: SplitAttributes, ) : EmbeddingRule(tag) { init { Preconditions.checkArgumentNonnegative(minWidthDp, "minWidthDp must be non-negative") Preconditions.checkArgumentNonnegative(minHeightDp, "minHeightDp must be non-negative") Preconditions.checkArgumentNonnegative( minSmallestWidthDp, "minSmallestWidthDp must be non-negative" ) } companion object { /** * When the min dimension is set to this value, it means to always allow split. * @see SplitRule.minWidthDp * @see SplitRule.minSmallestWidthDp */ const val SPLIT_MIN_DIMENSION_ALWAYS_ALLOW = 0 /** * The default min dimension in DP for allowing split if it is not set by apps. The value * reflects [androidx.window.core.layout.WindowWidthSizeClass.MEDIUM]. */ const val SPLIT_MIN_DIMENSION_DP_DEFAULT = 600 /** * The default max aspect ratio for allowing split when the parent window is in portrait. * @see SplitRule.maxAspectRatioInPortrait */ @JvmField val SPLIT_MAX_ASPECT_RATIO_PORTRAIT_DEFAULT = ratio(1.4f) /** * The default max aspect ratio for allowing split when the parent window is in landscape. * @see SplitRule.maxAspectRatioInLandscape */ @JvmField val SPLIT_MAX_ASPECT_RATIO_LANDSCAPE_DEFAULT = ALWAYS_ALLOW } /** * Determines what happens with the associated container when all activities are finished in * one of the containers in a split. * * For example, given that [SplitPairRule.finishPrimaryWithSecondary] is [ADJACENT] and * secondary container finishes. The primary associated container is finished if it's * adjacent to the secondary container. The primary associated container is not finished * if it occupies entire task bounds. * * @see SplitPairRule.finishPrimaryWithSecondary * @see SplitPairRule.finishSecondaryWithPrimary * @see SplitPlaceholderRule.finishPrimaryWithPlaceholder */ class FinishBehavior private constructor( /** The description of this [FinishBehavior] */ private val description: String, /** The enum value defined in `splitLayoutDirection` attributes in `attrs.xml` */ internal val value: Int, ) { override fun toString(): String = description companion object { /** Never finish the associated container. */ @JvmField val NEVER = FinishBehavior("NEVER", 0) /** * Always finish the associated container independent of the current presentation mode. */ @JvmField val ALWAYS = FinishBehavior("ALWAYS", 1) /** * Only finish the associated container when displayed adjacent to the one being * finished. Does not finish the associated one when containers are stacked on top of * each other. */ @JvmField val ADJACENT = FinishBehavior("ADJACENT", 2) @JvmStatic internal fun getFinishBehaviorFromValue( @IntRange(from = 0, to = 2) value: Int ): FinishBehavior = when (value) { NEVER.value -> NEVER ALWAYS.value -> ALWAYS ADJACENT.value -> ADJACENT else -> throw IllegalArgumentException("Unknown finish behavior:$value") } } } /** * Verifies if the provided parent bounds satisfy the dimensions and aspect ratio requirements * to apply the rule. */ internal fun checkParentMetrics(context: Context, parentMetrics: WindowMetrics): Boolean { if (Build.VERSION.SDK_INT <= Build.VERSION_CODES.R) { return false } val bounds = Api30Impl.getBounds(parentMetrics) val density = if (Build.VERSION.SDK_INT <= Build.VERSION_CODES.TIRAMISU) { context.resources.displayMetrics.density } else { Api34Impl.getDensity(parentMetrics, context) } return checkParentBounds(density, bounds) } /** * @see checkParentMetrics */ internal fun checkParentBounds(density: Float, bounds: Rect): Boolean { val width = bounds.width() val height = bounds.height() if (width == 0 || height == 0) { return false } val minWidthPx = convertDpToPx(density, minWidthDp) val minHeightPx = convertDpToPx(density, minHeightDp) val minSmallestWidthPx = convertDpToPx(density, minSmallestWidthDp) // Always allow split if the min dimensions are 0. val validMinWidth = minWidthDp == SPLIT_MIN_DIMENSION_ALWAYS_ALLOW || width >= minWidthPx val validMinHeight = minHeightDp == SPLIT_MIN_DIMENSION_ALWAYS_ALLOW || height >= minHeightPx val validSmallestMinWidth = minSmallestWidthDp == SPLIT_MIN_DIMENSION_ALWAYS_ALLOW || min(width, height) >= minSmallestWidthPx val validAspectRatio = if (height >= width) { // Portrait maxAspectRatioInPortrait == ALWAYS_ALLOW || height * 1f / width <= maxAspectRatioInPortrait.value } else { // Landscape maxAspectRatioInLandscape == ALWAYS_ALLOW || width * 1f / height <= maxAspectRatioInLandscape.value } return validMinWidth && validMinHeight && validSmallestMinWidth && validAspectRatio } /** * Converts the dimension from Dp to pixels. */ private fun convertDpToPx(density: Float, @IntRange(from = 0) dimensionDp: Int): Int { return (dimensionDp * density + 0.5f).toInt() } @RequiresApi(30) internal object Api30Impl { @DoNotInline fun getBounds(windowMetrics: WindowMetrics): Rect { return windowMetrics.bounds } } @RequiresApi(34) internal object Api34Impl { @DoNotInline fun getDensity(windowMetrics: WindowMetrics, context: Context): Float { // TODO(b/265089843) remove the try catch after U is finalized. return try { windowMetrics.density } catch (e: NoSuchMethodError) { context.resources.displayMetrics.density } } } override fun equals(other: Any?): Boolean { if (this === other) return true if (other !is SplitRule) return false if (!super.equals(other)) return false if (minWidthDp != other.minWidthDp) return false if (minHeightDp != other.minHeightDp) return false if (minSmallestWidthDp != other.minSmallestWidthDp) return false if (maxAspectRatioInPortrait != other.maxAspectRatioInPortrait) return false if (maxAspectRatioInLandscape != other.maxAspectRatioInLandscape) return false if (defaultSplitAttributes != other.defaultSplitAttributes) return false return true } override fun hashCode(): Int { var result = super.hashCode() result = 31 * result + minWidthDp result = 31 * result + minHeightDp result = 31 * result + minSmallestWidthDp result = 31 * result + maxAspectRatioInPortrait.hashCode() result = 31 * result + maxAspectRatioInLandscape.hashCode() result = 31 * result + defaultSplitAttributes.hashCode() return result } override fun toString(): String = "${SplitRule::class.java.simpleName}{" + " tag=$tag" + ", defaultSplitAttributes=$defaultSplitAttributes" + ", minWidthDp=$minWidthDp" + ", minHeightDp=$minHeightDp" + ", minSmallestWidthDp=$minSmallestWidthDp" + ", maxAspectRatioInPortrait=$maxAspectRatioInPortrait" + ", maxAspectRatioInLandscape=$maxAspectRatioInLandscape" + "}" } 将这个kotlin文件转为java文件
08-12
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