Circuits--Sequential--Counter_2

1.Counter 1-12

module top_module (
    input clk,
    input reset,
    input enable,
    output [3:0] Q,
    output c_enable,
    output c_load,
    output [3:0] c_d
); //

    assign c_enable=enable;
    assign c_load = (reset|((enable==1)&(Q==4'd12)));  //将counter置为1
    assign c_d = c_load ? 4'd1 : 4'd0;
    count4 the_counter (clk, c_enable, c_load, c_d ,Q);
   
endmodule

2.Counter 1000

module top_module (
    input clk,
    input reset,
    output OneHertz,
    output [2:0] c_enable
); //

    wire [3:0] one;
    wire [3:0] ten;
    wire [3:0] hun;
    
    assign c_enable = {(one==9)&(ten==9),(one==9),1'b1};
    assign OneHertz = {(one==9)&(ten==9)&(hun==9)};
    bcdcount counter0 (clk, reset, c_enable[0],one);
    bcdcount counter1 (clk, reset, c_enable[1],ten);
    bcdcount counter2 (clk, reset, c_enable[2],hun);

endmodule