Circuits--Sequential--Counters

1.Four-bit binary counter

module top_module (
    input clk,
    input reset,      // Synchronous active-high reset
    output [3:0] q);
 
    always@(posedge clk)
        begin
            if(reset)
                q<=0;
            else
                begin
                   q<=q+1'b1; 
                end
        end
    
endmodule

2.Decade counter

module top_module (
    input clk,
    input reset,        // Synchronous active-high reset
    output [3:0] q);
 
    always@(posedge clk)
        begin
            if(reset)
                q<=0;
            else 
                begin
                if(q<4'b1010)
                    q<=q+1'b1;
                if(q==4'b1001)
                    q<=0;
                end
        end
    
endmodule

3.Decade counter  again

module top_module (
    input clk,
    input reset,
    output [3:0] q);
    
    always@(posedge clk)
        begi