Verilog练习：HDLBits笔记18

五、Reading Simulations

Build a circuit from a simulation

1、Combinational circuit 1

Problem Statement：

This is a combinational circuit. Read the simulation waveforms to determine what the circuit does, then implement it.

module top_module (
    input a,
    input b,
    output q );

    assign q = a & b; 

endmodule

2、Combinational circuit 2

Problem Statement：

This is a combinational circuit. Read the simulation waveforms to determine what the circuit does, then implement it.

module top_module (
    input a,
    input b,
    input c,
    input d,
    output q );

    assign q = (c & d | ~c & ~d) & (a & b | ~a & ~b) | (~a & b | a & ~b) & (~c & d | c & ~d);

endmodule

3、Combinational circuit 3

Problem Statement：

This is a combinational circuit. R