psudo-LRU(Tree LRU) 的实现

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本文详细介绍了如何使用3位LRU位r0，r1，r2实现一组4行L0，L1，L2，L3的pseuso-LRU策略。通过设置不同的标志位，确定最近访问的行，并据此规则进行缓存替换操作。在清洗或复位时，所有LRU位将被清零。

pseudo-LRU

two-way set associative - one bit

   indicates which line of the two has been reference more recently


four-way set associative - three bits

   each bit represents one branch point in a binary decision tree; let 1
   represent that the left side has been referenced more recently than the
   right side, and 0 vice-versa

              are all 4 lines valid?
                   /       /
                 yes        no, use an invalid line
                  |
                  |
                  |
             bit_0 == 0?                                state | replace      ref to | next state
              /       /                                         ------+--------        -------+-----------
             y         n                                       00x  |  line_0      line_0 |    11_
            /           /                                       01x  |  line_1      line_1 |    10_
     bit_1 == 0?    bit_2 == 0?                   1x0  |  line_2      line_2 |    0_1
       /    /          /    /                                  1x1  |  line_3       line_3 |    0_0
      y      n        y      n
     /        /      /        /                                ('x' means           ('_' means unchanged)
   line_0  line_1  line_2  line_3                  don't care)

   (see Figure 3-7, p. 3-18, in Intel Embedded Pentium Processor Family Dev.
    Manual, 1998, http://www.intel.com/design/intarch/manuals/273204.htm)

note that there is a 6-bit encoding for true LRU for four-way set associative

  bit 0: bank[1] more recently used than bank[0]
  bit 1: bank[2] more recently used than bank[0]
  bit 2: bank[2] more recently used than bank[1]
  bit 3: bank[3] more recently used than bank[0]
  bit 4: bank[3] more recently used than bank[1]
  bit 5: bank[3] more recently used than bank[2]

  this results in 24 valid bit patterns within the 64 possible bit patterns
  (4! possible valid traces for bank references)

  e.g., a trace of 0 1 2 3, where 0 is LRU and 3 is MRU, is encoded as 111111

  you can implement a state machine with a 256x6 ROM (6-bit state encoding
  appended with a 2-bit bank reference input will yield a new 6-bit state),
  and you can implement an LRU bank indicator with a 64x2 ROM

参照下图：(一看就明白）

一组4行L0，L1，L2，L3共用3位LRU位r0，r1,r2。如果最近访问的是L0或L1，则r0位置1；否则（最近访问的是L2或者L3），则r0位置0. 在L0，L1之间，若最近访问的是L0，则r1置1；否则，r1置0. 在L2和L3之间，若最近访问的是L2，则r2置1；否则，r2置0。以上建立的r0,r1,r2三位标记，可使我们按如下规则替换有效行：

若 r0=0 且 r1=0, replace L0；

若 r0=0 且 r1=1, replace L1；

若 r0=1 且 r2=0, replace L2；

若 r0=1 且 r2=0, replace L3；

复位或清洗时，cache全部的LRU位都清零。