Process Corners: Terminology and Introduction

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于 2023-02-18 18:00:25 发布 · 2.3k 阅读

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#pcb工艺 #硬件工程

工艺角是半导体制造中用于描述集成电路设计在不同制造参数变化下的极端行为。通过对快、慢NMOS和PMOS的组合，分析电路在这些极端条件下的性能，确保设计的鲁棒性。时序分析通过各种PVT组合（过程、电压、温度）和OCV（片上变异性）来评估电路的性能。文章讨论了数字电路设计中工艺角的重要性，以及先进节点下更复杂的变异性挑战。

Introduction

from: https://en.wikipedia.org/wiki/Process_corners

In semiconductor manufacturing, a process corner is an example of a design-of-experiments (DoE) technique that refers to a variation of fabrication parameters used in applying an integrated circuit design to a semiconductor wafer. Process corners represent the extremes of these parameter variations within which a circuit that has been etched onto the wafer must function correctly. A circuit running on devices fabricated at these process corners may run slower or faster than specified and at lower or higher temperatures and voltages, but if the circuit does not function at all at any of these process extremes, the design is considered to have inadequate design margin.[1]

To verify the robustness of an integrated circuit design, semiconductor manufacturers will fabricate corner lots, which are groups of wafers that have had process parameters adjusted according to these extremes, and will then test the devices made from these special wafers at varying increments of environmental conditions, such as voltage, clock frequency, and temperature, applied in combination (two or sometimes all three together) in a process called characterization. The results of these tests are plotted using a graphing technique known as a shmoo plot that indicates clearly the boundary limit beyond which a device begins to fail for a given combination of these environmental conditions.

Corner-lot analysis is most effective in digital electronics because of the direct effect of process variations on the speed of transistor switching during transitions from one logic state to another, which is not relevant for analog circuits, such as amplifiers.

Types of corners

When working in the schematic domain, we usually only work with front end of line (FEOL) process corners as these corners will affect the performance of devices. But there is an orthogonal set of process parameters that affect back end of line (BEOL) parasitics.

FEOL corners

One naming convention for process corners is to use two-letter designators, where