MSP432P4控制智能车基础教学(一)

这篇教程介绍了MSP432P4单片机的基础操作,包括安装CCS11.0集成开发环境,配置MSP432引脚,以及GPIO的使用。讲解了如何通过二进制和十六进制进行进制转换,并详细说明了MSP432引脚的DIR和OUT属性,以及如何通过逻辑运算符进行引脚状态的精确控制。

一、基本目标

1.安装CCS11.0

2.熟练掌握MSP432引脚配置

二、安装CCS11步骤

1.下载链接 :http://software-dl.ti.com/ccs/esd/documents/ccs_downloads.html

2.点击图中标记处开始下载(如果不是Windows系统就根据情况选择其他选项)

3.下载完成后,开始安装,安装时有几个注意事项

 (1)关闭系统防火墙和杀毒软件(否则无法正常安装)

(2)安装路径和文件夹的名称必须为英文或数字字符

(3)管理员用户名不能有中文字符(有中文字符请到设置——账户里去修改)

4.安装流程

(1)检查完毕后点击Continue

(2)勾选SimpleLink MSP432 low power + performance MCUs(其余不用勾选)

(3)下一步,勾选TI XDS Debug Probe Support(其余不用勾选)

(4)点击finish,安装大约20分钟完成

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MSP432 低功耗高性能并存10.1 Digital I/O Introduction The digital I/O features include: • Independently programmable individual I/Os • Any combination of input or output • Individually configurable interrupts for ports (available for certain ports only) • Independent input and output data registers • Individually configurable pullup or pulldown resistors • Wake-up capability from ultra-low power modes (available for certain ports only) • Individually configurable high drive I/Os (available for certain I/Os only) Devices within the family may have up to eleven digital I/O ports implemented (P1 to P10 and PJ). Most ports contain eight I/O lines; however, some ports may contain less (see the device-specific data sheet for ports available). Each I/O line is individually configurable for input or output direction, and each can be individually read or written. Each I/O line is individually configurable for pullup or pulldown resistors. Certain ports have interrupt and wake-up capability from ultra-low power modes (see device specific data sheet for ports with interrupt and wake-up capability). Each interrupt can be individually enabled and configured to provide an interrupt on a rising or falling edge of an input signal. All interrupts are fed into an encoded Interrupt Vector register, allowing the application to determine which sub-pin of a port has generated the event. Individual ports can be accessed as byte-wide ports or can be combined into half-word-wide ports. Port pairs P1 and P2, P3 and P4, P5 and P6, P7 and P8, and so on, are associated with the names PA, PB, PC, PD, and so on, respectively. All port registers are handled in this manner with this naming convention. The main exception are the interrupt vector registers, for example, interrupts for ports P1 and P2 must be handled through P1IV and P2IV, PAIV does not exist. When writing to port PA with half-word operations, all 16 bits are written to the port. When writing to the lower byte of port PA using byte operations, the upper byte remains unchanged. Similarly, writing to the upper byte of port PA using byte instructions leaves the lower byte unchanged. When writing to a port that contains less than the maximum number of bits possible, the unused bits are don't care. Ports PB, PC, PD, PE, and PF behave similarly.
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