SERDES ibert测试

最新推荐文章于 2025-06-06 14:03:34 发布

hhpingyear

最新推荐文章于 2025-06-06 14:03:34 发布

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分类专栏： FPGA高速接口设计

本文链接：https://blog.youkuaiyun.com/hhpingyear/article/details/96750849

本文讨论了在Serdes测试中遇到的IBERT回环测试问题，特别是near-end-PCS误码率高于near-end-PMA误码率的现象。解决方案包括在PCS回环模式下确保CDR处于“lock to reference”模式，以及针对FPGA和非FPGA设备的回环设置。同时，提到了Vivado与ISE在IBERT测试中的差异以及HTG813和HTG814在外部回环测试中的注意事项。

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Serdes问题

Ibert回环测试问题
IBERT回环测试near-end-pcs误码率比near-end-pma误码率更高的问题。

AR# 53107 7 Series GTX/GTH Transceivers - Recommended usage in Near End PCS loopback mode

Description
This answer record provides guidelines to use 7 series GTX/GTH transceivers in PCS loopback mode.
Solution
In PCS loopback mode, if there is no connection from TXP/TXN to RXP/RXN, then RXRECCLK output from CDR is not expected to be good.
This is due to a lack of data transitions at the input to lock to.
If a design requires RXRECCLK for its fabric logic, the design can fail.
For these designs, it is recommended to use CDR in “lock to reference” mode.
Follow the steps below to make sure that the CDR is in “lock to reference” mode:
Step1: Drive the following signals
Set RXOUTCLKSEL to select RXOUTCLKPCS,

(OR)

Set RXCDRHOLD to 1’b1 and RXCDROVRDEN to 1’b0

Step2: Perform a full RX