给下面的A2L文件,每一行都加上中文注释,每一行都要
/* generated by ASAP2 Studio 2.4.34.10885 */
ASAP2_VERSION 1 71
/begin PROJECT HSAEVCU " Project Comments "
/begin MODULE MC ""
/begin A2ML
struct Protocol_Layer {
uint; /* XCP protocol layer version
e.g. "1.2" = 0x0102 */
uint; /* T1 [ms] */
uint; /* T2 [ms] */
uint; /* T3 [ms] */
uint; /* T4 [ms] */
uint; /* T5 [ms] */
uint; /* T6 [ms] */
uint; /* T7 [ms] */
uchar; /* MAX_CTO */
uint; /* MAX_DTO default for DAQ and STIM */
enum {
"BYTE_ORDER_MSB_LAST" = 0,
"BYTE_ORDER_MSB_FIRST" = 1
};
enum {
"ADDRESS_GRANULARITY_BYTE" = 1,
"ADDRESS_GRANULARITY_WORD" = 2,
"ADDRESS_GRANULARITY_DWORD" = 4
};
taggedstruct {
("OPTIONAL_CMD" enum {
"GET_COMM_MODE_INFO" = 251,
"GET_ID" = 250,
"SET_REQUEST" = 249,
"GET_SEED" = 248,
"UNLOCK" = 247,
"SET_MTA" = 246,
"UPLOAD" = 245,
"SHORT_UPLOAD" = 244,
"BUILD_CHECKSUM" = 243,
"TRANSPORT_LAYER_CMD" = 242,
"USER_CMD" = 241,
"DOWNLOAD" = 240,
"DOWNLOAD_NEXT" = 239,
"DOWNLOAD_MAX" = 238,
"SHORT_DOWNLOAD" = 237,
"MODIFY_BITS" = 236,
"SET_CAL_PAGE" = 235,
"GET_CAL_PAGE" = 234,
"GET_PAG_PROCESSOR_INFO" = 233,
"GET_SEGMENT_INFO" = 232,
"GET_PAGE_INFO" = 231,
"SET_SEGMENT_MODE" = 230,
"GET_SEGMENT_MODE" = 229,
"COPY_CAL_PAGE" = 228,
"CLEAR_DAQ_LIST" = 227,
"SET_DAQ_PTR" = 226,
"WRITE_DAQ" = 225,
"SET_DAQ_LIST_MODE" = 224,
"GET_DAQ_LIST_MODE" = 223,
"START_STOP_DAQ_LIST" = 222,
"START_STOP_SYNCH" = 221,
"GET_DAQ_CLOCK" = 220,
"READ_DAQ" = 219,
"GET_DAQ_PROCESSOR_INFO" = 218,
"GET_DAQ_RESOLUTION_INFO" = 217,
"GET_DAQ_LIST_INFO" = 216,
"GET_DAQ_EVENT_INFO" = 215,
"FREE_DAQ" = 214,
"ALLOC_DAQ" = 213,
"ALLOC_ODT" = 212,
"ALLOC_ODT_ENTRY" = 211,
"PROGRAM_START" = 210,
"PROGRAM_CLEAR" = 209,
"PROGRAM" = 208,
"PROGRAM_RESET" = 207,
"GET_PGM_PROCESSOR_INFO" = 206,
"GET_SECTOR_INFO" = 205,
"PROGRAM_PREPARE" = 204,
"PROGRAM_FORMAT" = 203,
"PROGRAM_NEXT" = 202,
"PROGRAM_MAX" = 201,
"PROGRAM_VERIFY" = 200,
"WRITE_DAQ_MULTIPLE" = 199
})*;
"COMMUNICATION_MODE_SUPPORTED" taggedunion {
"BLOCK" taggedstruct {
"SLAVE" ; /* Slave Block Mode supported */
"MASTER" struct {
uchar; /* MAX_BS */
uchar; /* MIN_ST */
};
};
"INTERLEAVED" uchar; /* QUEUE_SIZE */
};
"SEED_AND_KEY_EXTERNAL_FUNCTION" char[256]; /* Name of the Seed&Key function
including file extension
without path */
"MAX_DTO_STIM" uint; /* overrules MAX_DTO see above for STIM use case */
};
};
struct Daq {
enum {
"STATIC" = 0,
"DYNAMIC" = 1
};
uint; /* MAX_DAQ */
uint; /* MAX_EVENT_CHANNEL */
uchar; /* MIN_DAQ */
enum {
"OPTIMISATION_TYPE_DEFAULT" = 0,
"OPTIMISATION_TYPE_ODT_TYPE_16" = 1,
"OPTIMISATION_TYPE_ODT_TYPE_32" = 2,
"OPTIMISATION_TYPE_ODT_TYPE_64" = 3,
"OPTIMISATION_TYPE_ODT_TYPE_ALIGNMENT" = 4,
"OPTIMISATION_TYPE_MAX_ENTRY_SIZE" = 5
};
enum {
"ADDRESS_EXTENSION_FREE" = 0,
"ADDRESS_EXTENSION_ODT" = 1,
"ADDRESS_EXTENSION_DAQ" = 3
};
enum {
"IDENTIFICATION_FIELD_TYPE_ABSOLUTE" = 0,
"IDENTIFICATION_FIELD_TYPE_RELATIVE_BYTE" = 1,
"IDENTIFICATION_FIELD_TYPE_RELATIVE_WORD" = 2,
"IDENTIFICATION_FIELD_TYPE_RELATIVE_WORD_ALIGNED" = 3
};
enum {
"GRANULARITY_ODT_ENTRY_SIZE_DAQ_BYTE" = 1,
"GRANULARITY_ODT_ENTRY_SIZE_DAQ_WORD" = 2,
"GRANULARITY_ODT_ENTRY_SIZE_DAQ_DWORD" = 4,
"GRANULARITY_ODT_ENTRY_SIZE_DAQ_DLONG" = 8
};
uchar; /* MAX_ODT_ENTRY_SIZE_DAQ */
enum {
"NO_OVERLOAD_INDICATION" = 0,
"OVERLOAD_INDICATION_PID" = 1,
"OVERLOAD_INDICATION_EVENT" = 2
};
taggedstruct {
"DAQ_ALTERNATING_SUPPORTED" uint; /* Display_Event_Channel_Number */
"PRESCALER_SUPPORTED" ;
"RESUME_SUPPORTED" ;
"STORE_DAQ_SUPPORTED" ;
block "STIM" struct {
enum {
"GRANULARITY_ODT_ENTRY_SIZE_STIM_BYTE" = 1,
"GRANULARITY_ODT_ENTRY_SIZE_STIM_WORD" = 2,
"GRANULARITY_ODT_ENTRY_SIZE_STIM_DWORD" = 4,
"GRANULARITY_ODT_ENTRY_SIZE_STIM_DLONG" = 8
};
uchar; /* MAX_ODT_ENTRY_SIZE_STIM */
taggedstruct {
"BIT_STIM_SUPPORTED" ;
"MIN_ST_STIM" uchar; /* separation time between DTOs
time in units of 100 microseconds */
};
};
block "TIMESTAMP_SUPPORTED" struct {
uint; /* TIMESTAMP_TICKS */
enum {
"NO_TIME_STAMP" = 0,
"SIZE_BYTE" = 1,
"SIZE_WORD" = 2,
"SIZE_DWORD" = 4
};
enum {
"UNIT_1NS" = 0,
"UNIT_10NS" = 1,
"UNIT_100NS" = 2,
"UNIT_1US" = 3,
"UNIT_10US" = 4,
"UNIT_100US" = 5,
"UNIT_1MS" = 6,
"UNIT_10MS" = 7,
"UNIT_100MS" = 8,
"UNIT_1S" = 9,
"UNIT_1PS" = 10,
"UNIT_10PS" = 11,
"UNIT_100PS" = 12
};
taggedstruct {
"TIMESTAMP_FIXED" ;
};
};
"PID_OFF_SUPPORTED" ;
"MAX_DAQ_TOTAL" uint;
"MAX_ODT_TOTAL" uint;
"MAX_ODT_DAQ_TOTAL" uint;
"MAX_ODT_STIM_TOTAL" uint;
"MAX_ODT_ENTRIES_TOTAL" uint;
"MAX_ODT_ENTRIES_DAQ_TOTAL" uint;
"MAX_ODT_ENTRIES_STIM_TOTAL" uint;
"CPU_LOAD_MAX_TOTAL" float;
block "DAQ_MEMORY_CONSUMPTION" struct {
ulong; /* "DAQ_MEMORY_LIMIT" : in Elements[AG] */
uint; /* "DAQ_SIZE" : Anzahl Elements[AG] pro DAQ-Liste */
uint; /* "ODT_SIZE" : Anzahl Elements[AG] pro ODT */
uint; /* "ODT_ENTRY_SIZE" : Anzahl Elements[AG] pro ODT_Entry */
uint; /* "ODT_DAQ_BUFFER_ELEMENT_SIZE" : Anzahl Payload-Elements[AG]*Faktor = sizeof(Sendepuffer)[AG] */
uint; /* "ODT_STIM_BUFFER_ELEMENT_SIZE": Anzahl Payload-Elements[AG]*Faktor = sizeof(Empfangspuffer)[AG] */
};
(block "DAQ_LIST" struct {
uint; /* DAQ_LIST_NUMBER */
taggedstruct {
"DAQ_LIST_TYPE" enum {
"DAQ" = 1,
"STIM" = 2,
"DAQ_STIM" = 3
};
"MAX_ODT" uchar; /* MAX_ODT */
"MAX_ODT_ENTRIES" uchar; /* MAX_ODT_ENTRIES */
"FIRST_PID" uchar; /* FIRST_PID for this DAQ_LIST */
"EVENT_FIXED" uint; /* this DAQ_LIST always
in this event */
block "PREDEFINED" taggedstruct {
(block "ODT" struct {
uchar; /* ODT number */
taggedstruct {
("ODT_ENTRY" struct {
uchar; /* ODT_ENTRY number */
ulong; /* address of element */
uchar; /* address extension of element */
uchar; /* size of element [AG] */
uchar; /* BIT_OFFSET */
})*;
}; /* end of ODT_ENTRY */
})*; /* end of ODT */
}; /* end of PREDEFINED */
};
})*;
(block "EVENT" struct {
char[101]; /* EVENT_CHANNEL_NAME */
char[9]; /* EVENT_CHANNEL_SHORT_NAME */
uint; /* EVENT_CHANNEL_NUMBER */
enum {
"DAQ" = 1,
"STIM" = 2,
"DAQ_STIM" = 3
};
uchar; /* MAX_DAQ_LIST */
uchar; /* EVENT_CHANNEL_TIME_CYCLE */
uchar; /* EVENT_CHANNEL_TIME_UNIT */
uchar; /* EVENT_CHANNEL_PRIORITY */
taggedstruct {
"COMPLEMENTARY_BYPASS_EVENT_CHANNEL_NUMBER" uint;
"CONSISTENCY" enum {
"DAQ" = 0,
"EVENT" = 1
};
block "MIN_CYCLE_TIME" struct {
uchar; /* EVENT_CHANNEL_TIME_CYCLE */
uchar; /* EVENT_CHANNEL_TIME_UNIT */
};
"CPU_LOAD_MAX" float;
block "CPU_LOAD_CONSUMPTION_DAQ" struct {
float; /* "DAQ_FACTOR"*/
float; /* "ODT_FACTOR"*/
float; /* "ODT_ENTRY_FACTOR" */
taggedstruct {
(block "ODT_ENTRY_SIZE_FACTOR_TABLE" struct {
uint; /*"SIZE" */
float; /* "SIZE_FACTOR" */
})*;
};
};
block "CPU_LOAD_CONSUMPTION_STIM" struct {
float; /* "DAQ_FACTOR"*/
float; /* "ODT_FACTOR"*/
float; /* "ODT_ENTRY_FACTOR" */
taggedstruct {
(block "ODT_ENTRY_SIZE_FACTOR_TABLE" struct {
uint; /*"SIZE" */
float; /*"SIZE_FACTOR" */
})*;
};
};
block "CPU_LOAD_CONSUMPTION_QUEUE" struct {
float; /* "ODT_FACTOR" */
float; /* "ODT_ELEMENT_LOAD",length in elements[AG]*/
};
};
})*;
}; /* end of optional at DAQ */
};
taggedunion Daq_Event {
"FIXED_EVENT_LIST" taggedstruct {
("EVENT" uint)*;
};
"VARIABLE" taggedstruct {
block "AVAILABLE_EVENT_LIST" taggedstruct {
("EVENT" uint)*;
};
block "DEFAULT_EVENT_LIST" taggedstruct {
("EVENT" uint)*;
};
};
};
struct Pag {
uchar; /* MAX_SEGMENTS */
taggedstruct {
"FREEZE_SUPPORTED" ;
};
};
struct Pgm {
enum {
"PGM_MODE_ABSOLUTE" = 1,
"PGM_MODE_FUNCTIONAL" = 2,
"PGM_MODE_ABSOLUTE_AND_FUNCTIONAL" = 3
};
uchar; /* MAX_SECTORS */
uchar; /* MAX_CTO_PGM */
taggedstruct {
(block "SECTOR" struct {
char[101]; /* SECTOR_NAME */
uchar; /* SECTOR_NUMBER */
ulong; /* Address */
ulong; /* Length */
uchar; /* CLEAR_SEQUENCE_NUMBER */
uchar; /* PROGRAM_SEQUENCE_NUMBER */
uchar; /* PROGRAM_METHOD */
})*; /* end of SECTOR */
"COMMUNICATION_MODE_SUPPORTED" taggedunion {
"BLOCK" taggedstruct {
"SLAVE" ; /* Slave Block Mode supported */
"MASTER" struct {
uchar; /* MAX_BS_PGM */
uchar; /* MIN_ST_PGM */
};
};
"INTERLEAVED" uchar; /* QUEUE_SIZE_PGM */
};
};
};
struct Segment {
uchar; /* SEGMENT_NUMBER */
uchar; /* number of pages */
uchar; /* ADDRESS_EXTENSION */
uchar; /* COMPRESSION_METHOD */
uchar; /* ENCRYPTION_METHOD */
taggedstruct {
block "CHECKSUM" struct {
enum {
"XCP_ADD_11" = 1,
"XCP_ADD_12" = 2,
"XCP_ADD_14" = 3,
"XCP_ADD_22" = 4,
"XCP_ADD_24" = 5,
"XCP_ADD_44" = 6,
"XCP_CRC_16" = 7,
"XCP_CRC_16_CITT" = 8,
"XCP_CRC_32" = 9,
"XCP_USER_DEFINED" = 255
};
taggedstruct {
"MAX_BLOCK_SIZE" ulong; /* maximum block size
for checksum calculation */
"EXTERNAL_FUNCTION" char[256]; /* Name of the Checksum function
including file extension
without path */
};
};
(block "PAGE" struct {
uchar; /* PAGE_NUMBER */
enum {
"ECU_ACCESS_NOT_ALLOWED" = 0,
"ECU_ACCESS_WITHOUT_XCP_ONLY" = 1,
"ECU_ACCESS_WITH_XCP_ONLY" = 2,
"ECU_ACCESS_DONT_CARE" = 3
};
enum {
"XCP_READ_ACCESS_NOT_ALLOWED" = 0,
"XCP_READ_ACCESS_WITHOUT_ECU_ONLY" = 1,
"XCP_READ_ACCESS_WITH_ECU_ONLY" = 2,
"XCP_READ_ACCESS_DONT_CARE" = 3
};
enum {
"XCP_WRITE_ACCESS_NOT_ALLOWED" = 0,
"XCP_WRITE_ACCESS_WITHOUT_ECU_ONLY" = 1,
"XCP_WRITE_ACCESS_WITH_ECU_ONLY" = 2,
"XCP_WRITE_ACCESS_DONT_CARE" = 3
};
taggedstruct {
"INIT_SEGMENT" uchar; /* references segment that initialises this page */
};
})*; /* end of PAGE */
(block "ADDRESS_MAPPING" struct {
ulong; /* source address */
ulong; /* destination address */
ulong; /* length */
})*;
"PGM_VERIFY" ulong; /* verification value for PGM */
}; /* end of optional */
};
taggedstruct Common_Parameters {
block "PROTOCOL_LAYER" struct Protocol_Layer;
block "SEGMENT" struct Segment;
block "DAQ" struct Daq;
block "PAG" struct Pag;
block "PGM" struct Pgm;
block "DAQ_EVENT" taggedunion Daq_Event;
};
struct CAN_Parameters {
uint; /* XCP on CAN version
e.g. "1.2" = 0x0102 */
taggedstruct {
"CAN_ID_BROADCAST" ulong; /* Auto detection CAN-ID
master -> slaves
Bit31= 1: extended identifier */
"CAN_ID_MASTER" ulong; /* CMD/STIM CAN-ID
master -> slave
Bit31= 1: extended identifier */
"CAN_ID_MASTER_INCREMENTAL" ; /* master uses range of CAN-IDs
start of range = CAN_ID_MASTER
end of range = CAN_ID_MASTER+MAX_BS(_PGM)-1 */
"CAN_ID_SLAVE" ulong; /* RES/ERR/EV/SERV/DAQ CAN-ID
slave -> master
Bit31= 1: extended identifier */
"BAUDRATE" ulong; /* BAUDRATE [Hz] */
"SAMPLE_POINT" uchar; /* sample point
[% complete bit time] */
"SAMPLE_RATE" enum {
"SINGLE" = 1,
"TRIPLE" = 3
};
"BTL_CYCLES" uchar; /* BTL_CYCLES
[slots per bit time] */
"SJW" uchar; /* length synchr. segment
[BTL_CYCLES] */
"SYNC_EDGE" enum {
"SINGLE" = 1,
"DUAL" = 2
};
"MAX_DLC_REQUIRED" ; /* master to slave frames
always to have DLC = MAX_DLC = 8 */
(block "DAQ_LIST_CAN_ID" struct {
uint; /* reference to DAQ_LIST_NUMBER */
taggedstruct {
"VARIABLE" ;
"FIXED" ulong; /* this DAQ_LIST always
on this CAN_ID */
};
})*;
(block "EVENT_CAN_ID_LIST" struct {
uint; /* reference to EVENT_NUMBER */
taggedstruct {
("FIXED" ulong)*; /* this Event always on this ID */
};
})*;
"MAX_BUS_LOAD" ulong; /* maximum available bus
load in percent */
block "CAN_FD" struct {
taggedstruct {
"MAX_DLC" uint; /* 8, 12, 16, 20, 24, 32, 48 or 64 */
"CAN_FD_DATA_TRANSFER_BAUDRATE" ulong; /* BAUDRATE [Hz] */
"SAMPLE_POINT" uchar; /* sample point receiver
[% complete bit time] */
"BTL_CYCLES" uchar; /* BTL_CYCLES
[slots per bit time] */
"SJW" uchar; /* length synchr. segment
[BTL_CYCLES] */
"SYNC_EDGE" enum {
"SINGLE" = 1,
"DUAL" = 2
};
"MAX_DLC_REQUIRED" ; /* master to slave frames
always to have DLC = MAX_DLC_for CAN-FD */
"SECONDARY_SAMPLE_POINT" uchar; /* sender sample point
[% complete bit time] */
"TRANSCEIVER_DELAY_COMPENSATION" enum {
"OFF" = 0,
"ON" = 1
};
};
};
};
};
block "IF_DATA" taggedunion {
"XCPplus" struct {
uint;
taggedstruct Common_Parameters; /* default parameters */
taggedstruct {
(block "XCP_ON_CAN" struct {
struct CAN_Parameters; /* specific for CAN */
taggedstruct Common_Parameters; /* overruling of default */
taggedstruct {
"TRANSPORT_LAYER_INSTANCE" char[101]; /* name of the transport layer instance */
};
})*;
};
}; /************* end of XCP on different Transport Layers ********************/
"ETK" taggedstruct {
(block "SOURCE" struct {
char[100];
int;
long;
taggedstruct {
"QP_BLOB" struct {
uint;
uint;
enum {
"DIRECT" = 1,
"INDIRECT" = 2
};
uint;
enum {
"MEASUREMENT" = 0,
"BYPASS" = 1
};
ulong;
uint;
ulong;
ulong;
uint;
ulong;
ulong;
ulong;
uint;
uint;
uchar;
};
};
})*;
block "TP_BLOB" struct {
ulong;
enum {
"INTERFACE_SPEED_8MBIT" = 1,
"INTERFACE_SPEED_100MBIT" = 2
};
ulong;
taggedstruct {
"DISTAB_CFG" struct {
uint;
uint;
uint;
ulong;
ulong;
taggedstruct {
"TRG_MOD" (uchar)*;
};
};
"ETK_CFG" (uchar)*;
block "COLDSTART_HANDSHAKE" struct {
ulong;
taggedstruct {
"WAIT" (uchar)*;
"READY" (uchar)*;
};
};
"PAGE_SWITCH_METHOD" struct {
ulong;
taggedstruct {
"AUTOSTART_BEHAVIOR" enum {
"LAST_ACTIVE_PAGE" = 0,
"ALWAYS_WP" = 1,
"ALWAYS_RP" = 2
};
"OCT_WORKINGPAGE" struct {
ulong;
ulong;
ulong;
};
"OCT_REFERENCEPAGE" struct {
ulong;
ulong;
ulong;
};
};
};
};
};
};
};
/end A2ML
/begin MOD_PAR ""
/begin MEMORY_SEGMENT
DLMU "" DATA RAM INTERN 0xB0000000 0x30000 -1 -1 -1 -1 -1
/begin IF_DATA XCPplus
0x0102
/begin SEGMENT
0x00
0x02
0x00
0x00
0x00
/begin PAGE
0x00
ECU_ACCESS_DONT_CARE
XCP_READ_ACCESS_DONT_CARE
XCP_WRITE_ACCESS_NOT_ALLOWED
/end PAGE
/begin PAGE
0x01
ECU_ACCESS_DONT_CARE
XCP_READ_ACCESS_DONT_CARE
XCP_WRITE_ACCESS_WITH_ECU_ONLY
/end PAGE
/end SEGMENT
/end IF_DATA
/end MEMORY_SEGMENT
/begin MEMORY_SEGMENT
DSPR_Core0 "" DATA RAM INTERN 0x70004000 0x2EFF0 -1 -1 -1 -1 -1
/begin IF_DATA XCPplus
0x0102
/begin SEGMENT
0x00
0x02
0x00
0x00
0x00
/begin PAGE
0x00
ECU_ACCESS_DONT_CARE
XCP_READ_ACCESS_DONT_CARE
XCP_WRITE_ACCESS_NOT_ALLOWED
/end PAGE
/begin PAGE
0x01
ECU_ACCESS_DONT_CARE
XCP_READ_ACCESS_DONT_CARE
XCP_WRITE_ACCESS_WITH_ECU_ONLY
/end PAGE
/end SEGMENT
/end IF_DATA
/end MEMORY_SEGMENT