文章目录
- 单选题
-
- 1、Which one is the first step to start the verification?
- 2、Which of the following gates is universal which can be used to construct any Boolean function without any other type of gates?
- 3、In ARM AMBA AHB protocol, which of following responses is ONE cycle response?
- 4、To implement an FSM which has 5 states, at least how many DFFS is needed to use?
- 5、Which of the following statements regarding CDC(clock domain crossing) is true?
- 6、How many timing paths in the picture? ()
- 7、Which one can be used to represent the same coverage bin as "bins sa =( 3[->3] )”in SV: ()
- 8、Which technique be used to avoid control hazards in RISC pipeline?
- 9、A 4-way set associative cache has a total size of 256KB. Assume each cache line is of size 64 bytes, address size is 32. How many, address bits are needed as tag bits?
- 10、Which of the following method can decrease dynamic power ?
- 11、What is the result of the below code? ()
- 12、Which of the following is not a dynamic array built- in function:
- 13、Which of the following data- types is new in System Verilog ?
- 14、Which is the correct result of C?
- 15、If the following program enters "1", the output is ()
- 多选题
- 编程题
单选题
1、Which one is the first step to start the verification?
【A】. Write the test or stimulus
【B】. Write the functional coverage
【C】. Create the verification plan
【D】. Build the testbench
参考答案：C
2、Which of the following gates is universal which can be used to construct any Boolean function without any other type of gates?
【A】. AND, OR
【B】. NAND, NOR
【C】. AND, NOR
【D】. XOR, NOR
参考答案：B
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