Formality

formality中的cut-point应该怎么理解?

cut-point主要用在lowpower中，可以这么理解，假若你的设计有power-switch，那么这个开关开了和关了对后面电路的影响是不同的，这时候你在做formality的时候，工具的比较的时候就会发现不同，所以为了避免这种情况，你可以在你的power-switch后定义 cut-point，告诉工具，这要中止了，后面又算一个新的另外verify。

unread point 又该怎么理解?

unread points, A point which is not connected to any downstreampoint

Unread compare points are matched points that don't drive anything, thus they do not affect downstream compare points. By default these are not verified; however, from the U-2003.06 release there is a new variable verification_verify_unread_compare_point which will allow Formality to verify all these points. Just set the following variable before issuing the verify command: set verification_verify_unread_compare_points true

Problem: Unmatched

It is always a good to look at the unmatched points. There are many 
reasons for having unmatched points (spare cells, lockup latches, test pins, 
and so on). Many of them are in the implementation. Unmatched points in the 
reference design are usually compare points, which are unused and optimized 
away by the synthesis.

If there is no valid reason for these points to be unmatched, they will cause a 
failing verification. This is because these points will appear as "unmatched 
inputs" of downstream logic cones, and will generate a failure if the value is 
part of the function of the next compare point.

In many cases there can be unmatched points but the verification result might 
still be SUCCEEDED. 

Problem : Unverified

These are the compare points which have been matched, but left 'unverified' because 
you have set the 'limit' to number of points to be verified. This limit is set by the variable

verification_failing_point_limit 
set verification_failing_point_limit    200