i2c
芯片地址
| 8-bit | 7-bit | |
| write address | read address | address |
| 0x88 | 0x89 | 0x44 |
| 0x8a | 0x8b | 0x45 |
| 0x8c | 0x8d | 0x46 |
| 0x8e | 0x8f | 0x47 |
寄存器bank
| id | len | page | |
| 0 | 0x100 | 0 | CH_1 |
| 1 | 0x100 | 1 | CH_2 |
| 2 | 0x100 | 2 | CH_3 |
| 3 | 0x100 | 3 | CH_4 |
| 4 | CH_ALL | ||
| 5 | DATA_PAGE | ||
| 8 | 0x40 | 8 | MIPI_PAGE |
| 9 | AUDIO_PAGE |
register
sen_ad_tp2855/external/nvt_ad_tp2855_reg.h
#define AD_TP2855_SYSTEM_CLOCK_CTRL_REG_OFS 0xF5
ad_tp2855
8 // maximum number of chips which is supported by the external decoder driver
9 #define AD_TP2855_CHIP_MAX 3
10
11 // number of input channels in one chip
12 #define AD_TP2855_VIN_MAX 4
13
14 // number of output ports in one chip
15 #define AD_TP2855_VOUT_MAX 1
16
17 // i2c (max) address bytes & data bytes
18 #define AD_TP2855_I2C_ADDR_LEN 1
19 #define AD_TP2855_I2C_DATA_LEN 1
AD_VIN
g_ad_tp2855_vin
AD_VOUT
g_ad_tp2855_vout
AD_INFO
AD_TP2855_INFO
AD_DEV
g_ad_tp2855_info
ad_tp2855_open
ad_tp2855_close
ad_tp2855_init
ad_tp2855_uninit
ad_tp2855_get_cfg
ad_tp2855_set_cfg
ad_tp2855_chgmode
ad_tp2855_watchdog_cb
ad_tp2855_i2c_write
ad_tp2855_i2c_read
ad_drv_pwr_ctrl
ad_tp2855_dbg
1843 static ER ad_tp2855_dbg_dump_help(UINT32 chip_id)
1844 {
1845 AD_DUMP("\r\n=================================== AD %s DUMP HELP BEGIN (CHIP %u) ===================================\r\n", AD_TP2855_MODULE_NAME , chip_id);
1846
1847 AD_DUMP("CMD: dumpinfo\r\n");
1848 AD_DUMP("DESC: Show decoder information.\r\n");
1849 AD_DUMP("\r\n");
1850
1851 AD_DUMP("CMD: det\r\n");
1852 AD_DUMP("DESC: Trigger detection process once.\r\n");
1853 AD_DUMP("\r\n");
1854
1855 AD_DUMP("CMD: get\r\n");
1856 AD_DUMP("DESC: Get configuration.\r\n");
1857 AD_DUMP("\r\n");
1858
1859 AD_DUMP("CMD: set\r\n");
1860 AD_DUMP("DESC: Set configuration.\r\n");
1861 AD_DUMP("\r\n");
1862
1863 AD_DUMP("\r\n=================================== AD %s DUMP HELP END ===================================\r\n", AD_TP2855_MODULE_NAME);
1864
1865 return E_OK;
1866 }
struct AD_DEV
ad_common/ad.h
301 typedef struct { │·········
302 UINT32 chip_max; │·········
303 AD_INFO *chip; │·········
304 │·········
305 UINT32 slav_tab_max; │·········
306 UINT32 *slav_addr_tab; │·········
307 │·········
308 AD_OP op; │·········
309 } AD_DEV;
ad_common/ad_drv/ad_drv.h
video mode
AD_TP2855_I2C_REG
ad_tp2855_set_video_mode
pal
ntsc
720p25_tvi
720p25_ahd
720p30_tvi
720p30_ahd
1080p25_tvi
1080p25_ahd
1080p30_tvi
1080p30_ahd
1080p50
1080p60
MIPI mode
lane与最大分辨率
| up to | ||
| 4LANE | 4CH4LANE_297M | 1080p25/30x4 |
| 4CH4LANE_594M | QHD25/30x4 | |
| 2CH4LANE_297M | 1080p25/30x2 | |
| 2CH4LANE_594M | QHD25/30x2 | |
| 1CH4LANE_297M | QHD25/30x1 | |
| 2LANE | 4CH2LANE_594M | 720p25/30x4 |
| 2CH2LANE_297M | 720p25/30x2 | |
| 2CH2LANE_594M | 1080p25/30x2 | |
| 1CH2LANE_594M | QHD25/30x1 | |
| 1CH2LANE_297M | 1080p25/30x1 | |
| 1CH2LANE_148M | 720p25/30x1 (to do) | |
| 1LANE | 1CH1LANE_594M | 1080p25/30x1 |
| 1CH1LANE_297M | 720p25/30x1 |
寄存器比较
4ch4lane_297m、4ch4lane_594m、4ch2lane_594m、1ch2lane_594m(tct)
| reg | 4ch4lane_297m | 4ch4lane_594m | 4ch2lane_594m | 1ch2lane_594m |
| 0x20 | 0x44 | 0x44 | 0x42 | 0x12 |
| 0x34 | 0xe4 | 0xe4 | 0xe4 | 0x10? |
| 0x14 | 0x44 | |||
| 0x15 | 0x0d | 0x0c | 0x0c | 0x0c |
| 0x25 | 0x04 | 0x08 | 0x08 | 0x08 |
| 0x26 | 0x03 | 0x06 | 0x06 | 0x06 |
| 0x27 | 0x09 | 0x11 | 0x11 | 0x11 |
| 0x29 | 0x02 | 0x0a | 0x0a | 0x0a |
| 0x33 | 0x07 | 0x07 | 0x07 | 0x0f |
| 0x33 | 0x00 | 0x00 | 0x00 | 0x00 |
| 0x14 | 0x33 | 0x43 | 0x43 | |
| 0x14 | 0xc4 | 0xb3 | 0xc3 | 0xc3 |
| 0x14 | 0x44 | 0x33 | 0x43 | 0x43 |
| 0x23 | 0x03 | 0x03 | 0x03 | |
| 0x23 | 0x00 | 0x00 | 0x00 | |
| up to | 720p25/30x4 | 1080p25/30x4 | 720p25/30x4 | QHD25/30x1 |
ad_tp2855_set_mipi_output
MIPI_PAGE=8(sen_ad_tp2855/external/tp2802.h)
0x01 0xf0
0x02 0x01
0x08 0x0f
log
AD_DUMP
code/hdal/ext_devices/ad/ad_common/ad_drv/ad_drv_util.h
50 #define AD_DUMP(fmt, args...) printk(KERN_CONT fmt, ##args)
51 #define AD_WRN DBG_WRN
52 #define AD_ERR DBG_ERR
53 #define AD_IND DBG_IND
DBG_
41 #define NVT_DBG_FATAL 0
42 #define NVT_DBG_ERR 1
43 #define NVT_DBG_WRN 2
44 #define NVT_DBG_UNIT 3
45 #define NVT_DBG_FUNC 4
46 #define NVT_DBG_IND 5
47 #define NVT_DBG_MSG 6
48 #define NVT_DBG_VALUE 7
49 #define NVT_DBG_USER 8
213 #define DBG_FATAL(fmt, args...) nvt_dbg(FATAL, DBG_COLOR_FATAL "FATAL:%s() " fmt DBG_COLOR_END, __func__, ##args)
214 #define DBG_ERR(fmt, args...) nvt_dbg(ERR, DBG_COLOR_ERR "ERR:%s() " fmt DBG_COLOR_END, __func__, ##args)
215 #define DBG_WRN(fmt, args...) nvt_dbg(WRN, DBG_COLOR_WRN "WRN:%s() " fmt DBG_COLOR_END, __func__, ##args)
216 #define DBG_UNIT(fmt, args...) nvt_dbg(UNIT, DBG_COLOR_UNIT "UNIT:%s() " fmt DBG_COLOR_END, __func__, ##args)
217 #define DBG_FUNC_BEGIN(fmt, args...) nvt_dbg(FUNC, DBG_COLOR_FUNC "%s():begin " fmt DBG_COLOR_END, __func__, ##args)
218 #define DBG_FUNC(fmt, args...) nvt_dbg(FUNC, DBG_COLOR_FUNC "%s(): " fmt DBG_COLOR_END, __func__, ##args)
219 #define DBG_FUNC_END(fmt, args...) nvt_dbg(FUNC, DBG_COLOR_FUNC "%s():end " fmt DBG_COLOR_END, __func__, ##args)
220 #define DBG_IND(fmt, args...) nvt_dbg(IND, DBG_COLOR_IND "%s() " fmt DBG_COLOR_END, __func__, ##args)
221 #define DBG_MSG(fmt, args...) nvt_dbg(MSG, DBG_COLOR_MSG fmt DBG_COLOR_END, ##args)
222 #define DBG_VALUE(fmt, args...) nvt_dbg(VALUE, DBG_COLOR_VALUE fmt DBG_COLOR_END, ##args)
223 #define DBG_USER(fmt, args...) nvt_dbg(USER, DBG_COLOR_USER fmt DBG_COLOR_END, ##args)
224 #define DBG_DUMP(fmt, args...) vk_pr_warn(fmt, ##args)
nvt_dbg
code/vos/include/kwrap/debug.h
code/vos/drivers/include/kwrap/debug.h
87 #if (__DBGLVL__ == NVT_DBG_USER)
88 #define _NVT_DBG_CURRENT_ TOKEN_BIND(__MODULE__, _debug_level)
89 extern unsigned int _NVT_DBG_CURRENT_;
90
91 #define nvt_dbg(level, fmt, args...) do { \
92 if (unlikely(NVT_DBG_##level <= _NVT_DBG_CURRENT_)) { \
93 vk_pr_warn(fmt, ##args); \
94 } \
95 } while (0)
96
97 #else //#if (__DBGLVL__ == NVT_DBG_USER)
98 #define _NVT_DBG_CURRENT_ __DBGLVL__
99 #define nvt_dbg(level, fmt, args...) NVT_PRINT_##level(fmt, ##args)
100
101 #if (_NVT_DBG_CURRENT_ >= NVT_DBG_FATAL)
102 #define NVT_PRINT_FATAL(fmt, args...) vk_pr_warn(fmt, ##args)
103 #else
104 #define NVT_PRINT_FATAL(fmt, args...)
105 #endif
__DBGLVL__
59 //If __DBGLVL__ not defined, use NVT_DBG_WRN as the default level
60 #ifndef __DBGLVL__
61 #define __DBGLVL__ NVT_DBG_WRN
62 #endif
_debug_level
默认为2 wrn级别，可以通过proc文件系统修改dbglv。
ad_common/ad_drv/ad_drv.c
22 AD_DRV_DEBUG_LEVEL_TYPE ad_drv_debug_level = 2;
799 } else if (cmd_num == 2 && strcmp(cmd_list[0], "dbglv") == 0) {
800
801 ad_drv_info = ad_drv_get_info(0);
802
803 if (unlikely(ad_drv_info == NULL)) {
804 AD_ERR("ad drv dbg fail. NULL ad drv info\r\n");
805 return E_SYS;
806 }
807
808 if (ad_drv_info->dbg_func & AD_DRV_DBG_FUNC_DBGLV) {
809
810 if (strcmp(cmd_list[1], "err") == 0 || (sscanf_s(cmd_list[1], "%u", &narg[0]) == 1 && narg[0] == 1)) {
811 ad_drv_debug_level = 1;
812 AD_DUMP("dbglv = %u(%s)\r\n", 1, "err");
813 } else if (strcmp(cmd_list[1], "wrn") == 0 || (sscanf_s(cmd_list[1], "%u", &narg[0]) == 1 && narg[0] == 2)) {
814 ad_drv_debug_level = 2;
815 AD_DUMP("dbglv = %u(%s)\r\n", 2, "wrn");
816 } else if (strcmp(cmd_list[1], "ind") == 0 || (sscanf_s(cmd_list[1], "%u", &narg[0]) == 1 && narg[0] == 5)) {
817 ad_drv_debug_level = 5;
818 AD_DUMP("dbglv = %u(%s)\r\n", 5, "ind");
819 } else {
820 AD_ERR("dbglv err\r\n");
821 }
822
823 }
824 }
vk_pr_warn
8 #if defined(__LINUX) && defined(__KERNEL__)
9 #include <linux/printk.h>
10 #define vk_pr_warn pr_warn
11 #define vk_printk printk
12 #define vk_print_isr printk
13 #define vos_dump_stack dump_stack
14 #define __DBG_COLOR_MONO__
15
16 #elif defined(__FREERTOS)
17 #define vk_pr_warn debug_msg_isr
18 #define vk_printk debug_msg_isr
19 #define vk_print_isr debug_msg_isr
20
21 #ifndef unlikely
22 #define unlikely(x) (x)
23 #endif
24
25 #ifndef KERN_EMERG
26 #define KERN_EMERG ""
27 #endif
28
29 #else
30 #include <stdio.h>
31 #define vk_pr_warn printf
32 #define vk_printk printf
33 #define vk_print_isr printf
34
35 #ifndef unlikely
36 #define unlikely(x) (x)
37 #endif
38
39 #endif
/proc文件系统
std
cat /proc/sen_ad_tp2856/std
drv
echo help > /proc/sen_ad_tp2856/drv
|
CMD |
DESC | |
|
dumpinfo |
Show decoder information. |
AD DRV |
|
dumpreg |
Dump decoder all registers of all banks. | |
|
w ADDR(x) VAL(x) |
I2C write register. | |
|
wb BANK(x) ADDR(x) VAL(x) |
I2C write register with bank. | |
|
r ADDR(x) |
I2C read register. | |
|
rb BANK(x) ADDR(x) |
I2C read register with bank. | |
|
help |
Show command usage. | |
|
? | ||
|
dbglv LV(s) |
Change debug level. LV: err, wrn, ind. | |
|
dbglv LV(u) |
Change debug level. LV: 1(err), 2(wrn), 5(ind). | |
|
dumpinfo |
Show decoder information. |
AD tp2856 |
|
det |
Trigger detection process once. | |
|
get |
Get configuration. | |
|
set |
Set configuration. |
ad_tp2855_dbg
help
dumpinfo
echo dumpinfo 0 > /proc/sen_ad_tp2856/drv
[ 205.688728]
[ 205.688728] =================================== AD tp2856 DUMP INFO BEGIN (CHIP 0) ===================================
[ 205.701384] vin | raw_mode eq det_std cur_std
[ 205.706379] ==================================================================================================
[ 205.716696] 0 | 0 1 AHD AHD
[ 205.721582] 1 | 0 1 AHD AHD
[ 205.726476] 2 | 0 1 AHD AHD
[ 205.731358] 3 | 0 1 AHD AHD
[ 205.736245]
[ 205.736245] =================================== AD tp2856 DUMP INFO END ===================================
[ 205.747874]
det
get
echo get > /proc/sen_ad_tp2856/drv
[ 585.010753] lp: get lower-power time information.
[ 585.015653] clane: get clock lane enable.
[ 585.019908] dlane: get data lane enable.
[ 585.024083] lanenum: get data lane number.
[ 585.028612] vch: get virtual channel's vin source id.
[ 585.033933] patgen: get pattern gen mode.
lp
echo get lp > /proc/sen_ad_tp2856/drv
[ 675.412125] tprep = 0x6(6) = 192(ns)
[ 675.417316] ttrail = 0x11(17) = 432(ns)
clane
echo get clane > /proc/sen_ad_tp2856/drv
[ 749.351144] clk_lane0 = ENABLE
dlane
echo get dlane > /proc/sen_ad_tp2856/drv
[ 804.914422] data_lane0 = ENABLE
[ 804.918521] data_lane1 = ENABLE
[ 804.922709] data_lane2 = ENABLE
[ 804.926882] data_lane3 = ENABLE
lanenum
echo get lanenum > /proc/sen_ad_tp2856/drv
[ 869.762372] data lane num = 2
vch
echo get vch > /proc/sen_ad_tp2856/drv
[ 409.414996] virtual_ch_id_0 = 0x0
[ 409.419439] virtual_ch_id_1 = 0x0
[ 409.423945] virtual_ch_id_2 = 0x1
[ 409.428182] virtual_ch_id_3 = 0x0
ptgen
echo get patgen > /proc/sen_ad_tp2856/drv
[ 975.197014] vin0 patgen mode = AUTO
[ 975.201800] vin1 patgen mode = AUTO
[ 975.206314] vin2 patgen mode = AUTO
[ 975.210690] vin3 patgen mode = AUTO
set
echo set > /proc/sen_ad_tp2856/drv
[ 1623.346548] vfmt VIN(u) W(u) H(u) FPS(u) [prog(u)] [std(u)]: set video format of VIN. std: 0-TVI, 1-AHD
[ 1623.356238] tprep_reg VAL(x): set t_prep register.
[ 1623.361237] tprep_time VAL(x): set t_prep time(ns).
[ 1623.366309] ttrail_reg VAL(x): set t_trail register.
[ 1623.371458] ttrail_time VAL(x): set t_trail time(ns).
[ 1623.376699] clane EN(u): set clock lane enable. 0: disable, 1: enable
[ 1623.383359] clane_stop STOP(u): set clock lane stop. 0: normal, 1: stop
[ 1623.390200] dlane EN(u): set data lane enable. 0: disable, 1: enable
[ 1623.396774] lanenum NUM(u): set data lane number. 0~3
[ 1623.402010] vch VCH_ID(u) VIN_ID(u): set virtual channel's vin source id. 0~3
[ 1623.409388] patgen MODE(u): set pattern gen mode. 0: disable, 1: auto, 2: force
vfmt
echo set fmt 0 1920 1080 25 1 1 > /proc/sen_ad_tp2856/drv
echo set fmt 1 1920 1080 25 1 1 > /proc/sen_ad_tp2856/drv
echo set fmt 2 1920 1080 25 1 1 > /proc/sen_ad_tp2856/drv
echo set fmt 3 1920 1080 25 1 1 > /proc/sen_ad_tp2856/drv
vch
echo set vch 0 0 > /proc/sen_ad_tp2856/drv
echo set vch 0 1 > /proc/sen_ad_tp2856/drv
echo set vch 0 2 > /proc/sen_ad_tp2856/drv
echo set vch 0 3 > /proc/sen_ad_tp2856/drv
patgen
echo set patgen 1 > /proc/sen_ad_tp2856/drv
echo set patgen 2 > /proc/sen_ad_tp2856/drv
ad_std_drv.c
code/hdal/ext_devices/ad/ad_common/ad_std_drv.c
set_info_ad_std_drv
AD_ID_MAP
ad芯片视频输入映射到sen?，根据vcap_id修改CSI寄存器中的VIRTUAL_CH_ID，vcap_id 0 1 2 3分别修改VIRTUAL_CH_ID VIRTUAL_CH_ID2 VIRTUAL_CH_ID3 VIRTUAL_CH_ID4字段。
849 case CTL_SENDRV_CFGID_AD_ID_MAP:
850 ad_map_setting = (CTL_SENDRV_AD_ID_MAP_PARAM *)data;
851 ad_map[id].chip_id = ad_map_setting->chip_id;
852 ad_map[id].vin_id = ad_map_setting->vin_id;
853 //ad_map[id].vout_id = ad_map_setting->vout_id;
854 ad_map[id].vout_id = ad_get_outport_idx(ad_map_setting->chip_id, ad_map_setting->vin_id);
855 ad_map[id].inited = TRUE;
856 break;
255 static UINT8 ad_get_outport_idx(UINT8 chip_id, UINT8 inport)
256 {
257 UINT8 i, out_port = AD_OUT_P_MAX;
258
259 if (chip_id >= AD_MAX_CHIP_IDX) {
260 DBG_ERR("chip id %d > max (%d)\r\n", chip_id, AD_MAX_CHIP_IDX-1);
261 chip_id = 0;
262 }
263
264 for (i = 0; i < AD_OUT_P_MAX; i++) {
265 if (ad_info[chip_id].out[i].in & (1 << inport)) {
266 out_port = i;
267 break;
268 }
269 }
270
271 if (out_port == AD_OUT_P_MAX) {
272 DBG_ERR("outport search fail!! chip id=%d, inport=%d\r\n", chip_id, inport);
273 out_port = 0;
274 }
275
276 return out_port;
277 }
AD_TYPE
摄像头类型TVI AHD，tp2855驱动未实现。
870 case CTL_SENDRV_CFGID_AD_TYPE:
871 ad_type = (CTL_SENDRV_AD_IMAGE_PARAM *)data;
872 cfg_info.vin_id = ad_type->vin_id;
873 cfg_info.data = ad_type->val;
874 g_ad_dev->op.set_cfg(ad_map[id].chip_id, AD_CFGID_DET_CAM_TYPE, (void *)&cfg_info);
875 break;
code/hdal/ext_devices/ad/ad_common/ad.h
115 /*******************************************************************************
116 * video detect type *
117 *******************************************************************************/
118 typedef enum {
119 AD_TYPE_AUTO = 0, //
120 AD_TYPE_AHD = 0x1, //bit 0
121 AD_TYPE_TVI = 0x2, //bit 1
122 AD_TYPE_CVI = 0x4, //bit 2
123 AD_TYPE_SDI = 0x8, // bit 3
124 AD_TYPE_MAX = 0x0f, // bit 0~3
125 } AD_DET_TYPE;
chg_mode_ad_std_drv
修改某路视频输入的模式（分辨率、帧率、逐行/隔行)
737 static ER chg_mode_ad_std_drv(CTL_SEN_ID id, CTL_SENDRV_CHGMODE_OBJ chgmode_obj)
738 {
739
740 AD_CHGMODE_INFO ad_chgmode_info;
741 ER rt = E_OK;
742
743 ad_wait_sem(id);
744 g_ad_dev->chip[ad_map[id].chip_id].vout[ad_map[id].vout_id].depth = AD_DATA_DEPTH_8BIT;
745 g_ad_dev->chip[ad_map[id].chip_id].vout[ad_map[id].vout_id].mux_num = ad_info[ad_map[id].chip_id].out[ad_map[id].vout_id].in_num;
746
747 ad_chgmode_info.cur_update = FALSE;
748 ad_chgmode_info.vin_id = ad_map[id].vin_id;
749 ad_chgmode_info.vout_id = ad_map[id].vout_id;
750 ad_chgmode_info.mode = g_ad_dev->chip[ad_map[id].chip_id].vin[ad_map[id].vin_id].ui_format.mode_idx;
751 ad_chgmode_info.ui_info = g_ad_dev->chip[ad_map[id].chip_id].vin[ad_map[id].vin_id].ui_format;
752 ad_chgmode_info.cur_info = g_ad_dev->chip[ad_map[id].chip_id].vin[ad_map[id].vin_id].cur_format;
753 rt = g_ad_dev->op.chgmode(ad_map[id].chip_id, &ad_chgmode_info);
754
755 // only enable csi when not enable before
756 if ((mode_basic_param[id].if_type == CTL_SEN_IF_TYPE_MIPI) && ad_std_csi_en_cb && ad_std_csi_en_cnt[ad_map[id].chip_id] == 0) {
757 ad_sig_sem(id); // unlock before cb csi en
758
759 #if defined(__KERNEL__)
760 if (fastboot_stage != 1)
761 ad_std_csi_en_cb(id, TRUE);
762 #else
763 ad_std_csi_en_cb(id, TRUE);
764 #endif
765
766 ad_wait_sem(id); // lock for change ad_std_csi_en_cnt
767 ad_std_csi_en_cnt[ad_map[id].chip_id] = 1; // set en cnt to notify next power off can do csi disable cb, to prevent cb csi disable in case o f power on -> (without chgmode) -> power off
768 }
769 ad_sig_sem(id);
770
771 if (rt != E_OK) {
772 DBG_ERR("id%d, chgmode fail\r\n", (int)id);
773 return rt;
774 }
775 DBG_DUMP("^Gid%d chgmode done.\r\n", id);
776
777 if (ad_chgmode_info.cur_update == TRUE)
778 g_ad_dev->chip[ad_map[id].chip_id].vin[ad_map[id].vin_id].cur_format = ad_chgmode_info.cur_info;
779
780 #if defined(__KERNEL__)
781 fastboot_stage = 0;
782 #endif
783 return E_OK;
784 }
ad_update_mode_info
mux_num
ad_info in_num -》g_ad_dev mux_num-》 parallel_param[id].mux_info.mux_data_num
mode_info.mux_num -》parallel_param[id].mux_info.mux_data_num
450 switch(mode_info.bus_type) {
451 case AD_BUS_TYPE_PARALLEL:
452 mode_basic_param[id].if_type = CTL_SEN_IF_TYPE_PARALLEL;
453 parallel_param[id].mux_info.mux_data_num = mode_info.mux_num; //the mux_idx is selected by isf_vdocap
454 break;
455 case AD_BUS_TYPE_SERIAL:
456 mode_basic_param[id].if_type = CTL_SEN_IF_TYPE_MIPI;
457 mipi_param[id].data_lane = mode_info.mipi_lane_num;
458 break;
459 default:
460 DBG_ERR("AD bus_type error(%d)\r\n", mode_info.bus_type);
461 break;
462 }
CSI2
root@NVTEVM:~$ mem r 0x2f0302000
addr:0x2f0302000 map_addr:0x7f8e1d4000, map_size = 256
dump phy_addr=2f0302000 , vir_addr=0x7f8e1d4000, length=0x100 to console:
2f0302000 : 00000000 40020001 01000000 07080000 .......@......
2f0302010 : 00000000 00000000 00000000 00000000 ..............
2f0302020 : 0000FFFF 00000000 00000000 00000000 ..............
2f0302030 : 00000000 00000000 0000FF10 00000032 ............2.
2f0302040 : 00000000 00000000 00000000 00000000 ..............
2f0302050 : 32103210 00000005 00033300 00000000 .2.2.....3....
2f0302060 : 00008888 00000000 00000000 00000000 ..............
2f0302070 : 00000000 00000000 00000000 00000000 ..............
2f0302080 : 00000300 00000000 00000000 00000000 ..............
2f0302090 : 01000000 00000000 00000000 00000000 ..............
2f03020a0 : 00000000 00000000 00000000 00000000 ..............
2f03020b0 : 00000000 00000000 00000000 00000000 ..............
2f03020c0 : 00000000 00000000 00000000 00000000 ..............
2f03020d0 : 00000000 00000000 00000000 00000000 ..............
2f03020e0 : 00000000 00000000 00000000 00000000 ..............
2f03020f0 : 00000000 00000000 00000000 00000000 ..............
VIN_ID=2
VCAP_ID=0
root@NVTEVM:~$ mem r 0x2f0302000
addr:0x2f0302000 map_addr:0x7fb5806000, map_size = 256
dump phy_addr=2f0302000 , vir_addr=0x7fb5806000, length=0x100 to console:
2f0302000 : 80040011 6A012103 0F000000 10000438 .....!.j....8.
2f0302010 : 40F0F243 000000FF 00000490 00012000 C..@.........
2f0302020 : 0000FFFF 0000009E 0F00000E 00000000 ..............
2f0302030 : 00000000 00000000 0000FF10 000000FF ..............
2f0302040 : 00000000 00000438 00000000 00000000 ....8.........
2f0302050 : 44104410 00000005 00043333 00000000 .D.D....33....
2f0302060 : 00038811 00100000 00000000 00000000 ..............
2f0302070 : 00000000 03FC0F00 00000000 00000000 ..............
2f0302080 : 00000500 00000000 00000000 00200000 ..............
2f0302090 : 01000000 00000000 00000000 00000000 ..............
2f03020a0 : 00000000 00000000 00000000 00000000 ..............
2f03020b0 : 00000000 00000000 00000000 00000000 ..............
2f03020c0 : 00000000 00000000 00000000 00000000 ..............
2f03020d0 : 00000000 00000000 00000000 00000000 ..............
2f03020e0 : 00000000 00000000 00000000 00000000 ..............
2f03020f0 : 00000000 00000000 00000000 00000000 ..............
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