MSI Capability被所有需要产生中断的PCIe 设备所需要,其Capability的寄存器结构如下:
Byte Offset |
Byte 3 |
Byte 2 |
Byte 1 |
Byte 0 |
|
Message Control Register |
Next Capability Pointer |
Capability ID (0x05) |
|
+0x4 |
MSI Lower 32-bit Address Register |
|||
+0x8 |
MSI Upper 32-bit Address Register |
|||
+0xC |
Reserved |
MSI Data |
||
+0x10 |
Mask Bits Register |
|||
+0x14 |
Pending Bits Register |
以下内容来自王齐老师的博客:
MSICapability结构共有四种组成方式,分别是32和64