34、性能优化与多线程编程：从缓存到并行计算

性能优化与多线程编程：从缓存到并行计算

1. 缓存与内存访问

内存访问的方式对缓存命中率有着显著影响。顺序访问内存能够大幅减少缓存缺失。以下是两组不同命令下的缓存相关数据：
| 命令 | I refs | I1 misses | LLi misses | I1 miss rate | LLi miss rate | D refs | D1 misses | LLd misses | D1 miss rate | LLd miss rate | LL refs | LL misses | LL miss rate |
| — | — | — | — | — | — | — | — | — | — | — | — | — | — |
| ==17022== | - | 804 | - | 0.00% | 0.00% | 67,163,682 (40,974 rd + 67,122,708 wr) | 67,111,793 ( 2,384 rd + 67,109,409 wr) | 67,111,408 ( 2,034 rd + 67,109,374 wr) | 99.9% ( 5.8% + 100.0% ) | 99.9% ( 5.0% + 100.0% ) | 67,112,602 ( 3,193 rd + 67,109,409 wr) | 67,112,212 ( 2,838 rd + 67,109,374 wr) | 20.0% ( 0.0% + 100.0% ) |
| ==17023== | 336,117,093 | 813 | 808 | 0.00% | 0.00% | 67,163,675 (40,970 rd + 67,122,705 wr) | 16,780,14