Following is the solution that can identify whether current RAL access is from rail0 or rail1 automatically.
1) In svidRegFile, use 12 bits for block based address, among them lower 8 bits are “actual ” register base address, while higher 4 bits are used for SVID VR address, for example , if it is rail0, the higher 4 bits would be “4’b0000”, if rail1: 4’b0001, if rail2: 4’b0010,…..
system svidRegSys {
bytes 64;
block svidRail0=svidReg0 @'h000;
block svidRail1=svidReg1 @'h100;
}
2) In svidXactor, divide the 12 bits address into SVID VR address + register actual address as following:
task svidXactor::prepare_ralrd_trans(input svidRALTrans ral_trans);
svid_trans.address=ral_trans.addr[11:8];//VR address
svid_trans.cmd=5'h07;//GETREG;
svid_trans.payload=ral_trans.addr[7:0];//register address
…
endtask
task svidXactor::prepare_ralwr_trans(input svidRALTrans ral_trans);
//phase0: send SETREGADR command
svid_trans.address=ral_trans.addr[11:8];//VR address
svid_trans.cmd=5'h05;//SETREGADR;
svid_trans.payload=ral_trans.addr[7:0];//register address
…
///phase1:send SETREGDAT command
svid_trans.address=ral_trans.addr[11:8];//VR address
svid_trans.cmd=5'h06;//SETREGDAT;
svid_trans.payload=ral_trans.data;//register data
endtask