Verilog学习——led闪烁

一、代码实现

设计定义：实现led灯每一秒闪烁一次

代码如下：

`timescale 1ns / 1ns
module led_flash(
    input   clk     ,
    input   rstn    ,
    output  led     
    ); 

    reg     r_led   ;
    assign led = r_led;
 
    reg[24:0]   cnt ; //计数器位宽25000000二进制需要25位
always @(posedge clk or negedge rstn) 
    begin
        if(!rstn)
            cnt <= 0;
        else if(cnt == 25_000_000-1) //500ms翻转一次，板上晶振50MHZ，时钟周期为20ns 因此需计数500*10^6/20
            cnt <= 0;
        else
            cnt <= cnt + 1'd1;    
    end
always @(posedge clk or negedge rstn) begin
    if(!rstn)
        r_led <= 0;
    else if(cnt == 25_000_000-1)
        r_led <= ~r_led;
    //else 因为这是省略了的话，会自动生成锁存器，同样输出led<=led
    //   led <= led;
end
endmodule

 

二、仿真

`timescale 1ns / 1ns
module led_flash_tb();
reg  clk  ;
reg  rstn ;
wire led  ;
led_flash led_flash_inst0(
    .clk  (clk )  ,
    .rstn (rstn)  ,
    .led  (led )   
    ); 

initial clk = 1;
always #10 clk = ~clk;

initial begin
    rstn = 0;
    #201;
    rstn = 1;
    #2000_000_000;
    $stop;
end
endmodule

如上：给予时钟周期20ns，总共运行仿真2s=2000_000_000ns.