IC Design 之设计流程和工具

IC Design 之设计流程和工具

  (2009-06-29 22:28:03)

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分类： IC info&tech

Flow:
◆ Pre-Study and Market Analyze
◆ ASIC Function Specification
◆ Top-Level Architecture Design
◆ Identify needed IP and Select team members
◆ Estimate Silicon area,pin-out,cost and power
◆ Module Detail Specification
◆ Module Implementation, RTL Code and Initial trial synthesis
◆ Subsystem Simulation with Feature lists
◆ Familiar with Simulation Environment and write Testcase
◆ System Simulation and Top-Level Logic Synthesis
◆ Pre-STA and Pre-netlist Simulation
◆ RTL To Pre-netlist Formality
◆ Code coverage analyze
◆ Final Pre-netlist delivered
◆ Layout and Backend
◆ Device pin lists and Package
◆ DFT and ATPG
◆ Layout Floorplan,Place and Route
◆ Preparation for Testing of the Silicon
◆ Pre-netlist To Post-netlist Formality
◆ Post-nelist simulation and statice timing analyze
◆ Test vectors (IDDQ,scan and functional) prepare
◆ ASIC Sign-Off
◆ Tape-out and manufacture
◆ Testing of the Sample Silicon

 

Tools:
Synopsys、Cadence、Magma、Mentor、Specman