Tessent Diagnosis-Driven Yield Analysis/Tessent 基于诊断的良率分析

Tessent Diagnosis leverages failure data from manufacturing tests, scan test patterns, and design information to pinpoint and classify defects causing failures. This detailed analysis of devices that fail manufacturing tests significantly reduces the effort required for failure analysis and supports a diagnosis-driven yield analysis flow.

Operating within the Tessent Shell environment, Tessent Diagnosis provides advanced diagnostics for troubleshooting chips that fail on Automated Test Equipment (ATE). The insights gained from this troubleshooting process can be used to enhance chip yield through improvements in design and manufacturing processes.

The layout-aware diagnosis flow utilizes your design’s LEF/DEF files to create a Layout Database (LDB), which is then used for diagnosis and reporting. This flow allows you to view diagnosis results in Calibre DE