[xilinx.com:ip:smartconnect:1.0-1] design_1_smartconnect_0_0: The device(s) attached to /M05_AXI do not share a common clock frequency with this smartconnect instance. Modify the clock frequency values of the attached device(s) or re-customize this AXI SmartConnect instance to add a new clock pin and connect it to the same clock source of the IP attached to /M05_AXI to prevent further clock DRC violations.
自定义IP的时钟线连对后,时钟端口属性与SmartConnect不匹配 ;去掉后虽然IP封装会报警告但是正式工程中没有Critical Warning了
更新到正式工程中后,需要Generate IP ;或者reset_project之后重新综合