【RISC-V设计-13】- RISC-V处理器设计K0A之指令测试

【RISC-V设计-13】- RISC-V处理器设计K0A之指令测试

1.简介

借助上一篇文章所提及的验证环境，在本篇文章中，将会阐述如何增添一个用例来验证指令集，以及怎样运用编译器编译汇编代码，并生成二进制的 Bin 文件。针对 RISC-V 所使用的编译器，这里采用的是“山河编译器”。山河编译器（MounRiver Studio）是一款国产的集成开发环境（IDE），官网地址：http://www.mounriver.com，可自行下载对应版本，并将编译器路径添加到环境变量中。

2.验证用例

// -------------------------------------------------------------------------------------------------
// Copyright 2024 Kearn Chen, kearn.chen@aliyun.com
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// 
//     http://www.apache.org/licenses/LICENSE-2.0
// 
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
// -------------------------------------------------------------------------------------------------
// Description :
//             1. Instr smoke test
// -------------------------------------------------------------------------------------------------

task initcase;

    load_instr("instr_smoke_test/instr_smoke_test.bin");

endtask

task testcase;

    #1_000_000;

endtask

在验证用例中，任务initcase加载Bin文件到仿真模型中，任务testcase延迟1毫秒，等待CPU执行完软件指令。

3.指令代码

/*Copyright 2018-2021 T-Head Semiconductor Co., Ltd.

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

    http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
.text
.align 1
.global _start
_start:

#---------------------------------------#
#       main execution routine          #  
#---------------------------------------#
#---------------------------------------#
#          RV32I  instructions          #
#---------------------------------------#
#---------------------------------------#
#          Int Reg-imm Ins              #
#---------------------------------------#
#ADDi
ADDI:
    #func 1 test basic
    #-1 +5
    li          x5, 0x4
    li          x4, 0x5
    addi        x4, x4, 0xffffffff
    bne         x4, x5, TEST_FAIL

    #2047+2047
    li          x5, 0xffe
    li          x4, 0x7ff
    addi        x4, x4, 0x7ff
    bne         x4, x5, TEST_FAIL

    #-2048+-2048
    li          x5, 0xfffff000
    li          x4, 0xfffff800
    addi        x4, x4, 0xfffff800
    bne         x4, x5, TEST_FAIL

    #func 2 test MV
    addi        x4, x4, 0x123
    addi        x5, x4, 0x0
    bne         x4, x5, TEST_FAIL

    #func 3 test nop
    li          x5, 0x0
    addi        x5, x5, 0x0
    addi        x0, x0, 0x0
    addi        x0, x0, 0x5
    bne         x5, x0, TEST_FAIL

#SLTI
SLTI:
    li          x4, 0x1
    #signed compare 0xfff compare with 0xffffffff(imm expand)
    li          x5, 0xfff
    slti        x5, x5, 0xffffffff
    bne         x5, x0, TEST_FAIL
    
    #signed compare 0xfff compare with 0x1(imm not expand)
    li          x5, 0xfff
    slti        x5, x5, 0x1
    bne         x5, x0, TEST_FAIL
    
    #signed compare 0xffffffff compare with 0x1 
    li          x5, 0xffffffff
    slti        x5, x5, 0x1
    bne         x5, x4, TEST_FAIL
    
    #signed compare 0x1 compare with 0x1
    li          x5, 0x1
    slti        x5, x5, 0x1
    bne         x5, x0, TEST_FAIL

#SLTIU
SLTIU:
    li          x4, 0x1
    #0xffffffff compare with 0xfff
    li          x5, 0xffffffff
    sltiu       x5, x5, 0x7ff
    bne         x5, x0, TEST_FAIL
    
    #0xfff compare with 0x1
    li          x5, 0xfff
    sltiu       x5, x5, 0x1
    bne         x5, x0, TEST_FAIL
    
    #0x1 compare with 0xfff(no sign extend)
    li          x5, 0x1
    sltiu       x5, x5, 0x7ff
    bne         x5, x4, TEST_FAIL

#ANDI
ANDI:
    #0xaaaaaaaa andi 0xfff(sign exte