解析GPU cache 中读写操作及其事件

最新推荐文章于 2025-06-25 21:44:42 发布

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#缓存 #gpu

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本文详细介绍了基于GPGPU-SIM代码实现的缓存管理技术，包括无写回策略及写回策略下的读请求处理流程，以及如何向更低层级的缓存或内存发送写请求。这些技术对于理解高性能计算中缓存的行为至关重要。

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基于GPGPU-SIM代码，对读写操作进行解析

1.对于cache不应用写回策略的发送读请求

/// Read miss handler without writeback
void baseline_cache::send_read_request(new_addr_type addr, new_addr_type block_addr, unsigned cache_index, mem_fetch *mf,
        unsigned time, bool &do_miss, std::list<cache_event> &events, bool read_only, bool wa){

    bool wb=false;
    cache_block_t e;
    send_read_request(addr, block_addr, cache_index, mf, time, do_miss, wb, e, events, read_only, wa);
}

2.对于cache 应用写回策略的发送读请求

/// Read miss handler. Check MSHR hit or MSHR available
///检查MSHR是否命中，或者满

void baseline_cache::send_read_request(new_addr_type addr, new_addr_type block_addr, unsigned cache_index, mem_fetch *mf,
        unsigned time, bool &do_miss, bool &wb, cache_block_t &evicted, std::list<cache_event> &events, bool read_only, bool wa){

    bool mshr_hit = m_mshrs.probe(block_addr);
    bool mshr_avail = !m_mshrs.full(block_addr);
    if ( mshr_hit && mshr_avail ) {
        if(read_only)
            m_tag_array->access(block_addr,time,cache_index);
        else
            m_tag_array->access(block_addr,time,cache_index,wb,evicted);

        m_mshrs.add(block_addr,mf);
        do_miss = true;
    } else if ( !mshr_hit && mshr_avail && (m_miss_queue.size() < m_config.m_miss_queue_size) ) {
        if(read_only)
            m_tag_array->access(block_addr,time,cache_index);
        else
            m_tag_array->access(block_addr,time,cache_index,wb,evicted);

        m_mshrs.add(block_addr,mf);
        m_extra_mf_fields[mf] = extra_mf_fields(block_addr,cache_index, mf->get_data_size());
        mf->set_data_size( m_config.get_line_sz() );
        m_miss_queue.push_back(mf);
        mf->set_status(m_miss_queue_status,time);
        if(!wa)
            events.push_back(READ_REQUEST_SENT);
        do_miss = true;
    }
}

3.向下级 cache or memory 发送写请求

/// Sends write request to lower level memory (write or writeback)
void data_cache::send_write_request(mem_fetch *mf, cache_event request, unsigned time, std::list<cache_event> &events){
    events.push_back(request);
    m_miss_queue.push_back(mf);
    mf->set_status(m_miss_queue_status,time);
}