//---------------------------------------------------------------------------// Example: InitFlash://---------------------------------------------------------------------------// This function initializes the Flash Control registers// CAUTION// This function MUST be executed out of RAM. Executing it// out of OTP/Flash will yield unpredictable resultsvoidInitFlash(void){
EALLOW;//Enable Flash Pipeline mode to improve performance//of code executed from Flash.
FlashRegs.FOPT.bit.ENPIPE =1;// CAUTION//Minimum waitstates required for the flash operating//at a given CPU rate must be characterized by TI.//Refer to the datasheet for the latest information.#ifCPU_FRQ_150MHZ//Set the Paged Waitstate for the Flash
FlashRegs.FBANKWAIT.bit.PAGEWAIT =5;//Set the Random Waitstate for the Flash
FlashRegs.FBANKWAIT.bit.RANDWAIT =5;//Set the Waitstate for the OTP
FlashRegs.FOTPWAIT.bit.OTPWAIT =8;#endif#ifCPU_FRQ_100MHZ//Set the Paged Waitstate for the Flash
FlashRegs.FBANKWAIT.bit.PAGEWAIT =3;//Set the Random Waitstate for the Flash
FlashRegs.FBANKWAIT.bit.RANDWAIT =3;//Set the Waitstate for the OTP
FlashRegs.FOTPWAIT.bit.OTPWAIT =5;#endif// CAUTION//ONLY THE DEFAULT VALUE FOR THESE 2 REGISTERS SHOULD BE USED
FlashRegs.FSTDBYWAIT.bit.STDBYWAIT =0x01FF;
FlashRegs.FACTIVEWAIT.bit.ACTIVEWAIT =0x01FF;
EDIS;//Force a pipeline flush to ensure that the write to//the last register configured occurs before returning.asm(" RPT #7 || NOP");}
在CMD文件中,需要对ramfuncs这个段进行配置。如:
MEMORY
{
RAML0 : origin =0x008000, length =0x001000}
SECTIONS
{
ramfuncs : LOAD = FLASHD, RUN = RAML0,LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart), PAGE =0}
SECTIONS
{/* Setup for "boot to SARAM" mode:
The codestart section (found in DSP28_CodeStartBranch.asm)
re-directs execution to the start of user code. */
codestart :> BEGIN, PAGE =0
ramfuncs :> RAML0, PAGE =0.text :> RAML1, PAGE =0.cinit :> RAML0, PAGE =0.pinit :> RAML0, PAGE =0.switch:> RAML0, PAGE =0.stack :> RAMM1, PAGE =1.ebss :> RAML4, PAGE =1.econst :> RAML5, PAGE =1.esysmem :> RAMM1, PAGE =1}