/**************************************************************************************
* ?2008 Microchip Technology Inc.
*
* FileName: Center_Aligned_PWM.c
* Dependencies: Header (.h) files if applicable, see below
* Processor: dsPIC33FJ46GS610
* Compiler: MPLAB?C30 v3.02 or higher
* IDE: MPLAB?IDE v8.36.02 or later
* Hardware Dependencies: explorer 16 board
*
* SOFTWARE LICENSE AGREEMENT:
* Microchip Technology Incorporated ("Microchip") retains all ownership and
* intellectual property rights in the code accompanying this message and in all
* derivatives hereto. You may use this code, and any derivatives created by
* any person or entity by or on your behalf, exclusively with Microchip's
* proprietary products. Your acceptance and/or use of this code constitutes
* agreement to the terms and conditions of this notice.
*
* CODE ACCOMPANYING THIS MESSAGE IS SUPPLIED BY MICROCHIP "AS IS". NO
* WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED
* TO, IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE APPLY TO THIS CODE, ITS INTERACTION WITH MICROCHIP'S
* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
*
* YOU ACKNOWLEDGE AND AGREE THAT, IN NO EVENT, SHALL MICROCHIP BE LIABLE, WHETHER
* IN CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR BREACH OF STATUTORY DUTY),
* STRICT LIABILITY, INDEMNITY, CONTRIBUTION, OR OTHERWISE, FOR ANY INDIRECT, SPECIAL,
* PUNITIVE, EXEMPLARY, INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, FOR COST OR EXPENSE OF
* ANY KIND WHATSOEVER RELATED TO THE CODE, HOWSOEVER CAUSED, EVEN IF MICROCHIP HAS BEEN
* ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWABLE BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO
* THIS CODE, SHALL NOT EXCEED THE PRICE YOU PAID DIRECTLY TO MICROCHIP SPECIFICALLY TO
* HAVE THIS CODE DEVELOPED.
*
* You agree that you are solely responsible for testing the code and
* determining its suitability. Microchip has no obligation to modify, test,
* certify, or support the code.
*
* Description:
* This program sets up the PWM module for center aligned mode operation. The
* PWM1 outputs are configured to produce a 400kHz PWM signal with independent
* duty cycle. PWM1H produces 50% duty cycle and PWM1L produces 25% duty cycle.
* PWM2 outputs are configured to produce 400kHz PWM in complementary mode. The
* duty cycle of PWM2 is 50%.
*
*
*****************************************************************************/
#include "p33FJ64GS610.h"
/* Configuration Bit Settings */
_FOSCSEL(FNOSC_FRC)
_FOSC(FCKSM_CSECMD & OSCIOFNC_ON)
_FWDT(FWDTEN_OFF)
_FPOR(FPWRT_PWR128 )
_FICD(ICS_PGD1 & JTAGEN_OFF)
void init_PWM(void);
int main()
{
/* Configure Oscillator to operate the device at 40Mhz
Fosc= Fin*M/(N1*N2), Fcy=Fosc/2
Fosc= 7.37*(43)/(2*2)=80Mhz for Fosc, Fcy = 40Mhz */
/* Configure PLL prescaler, PLL postscaler, PLL divisor */
PLLFBD=41; /* M = PLLFBD + 2 */
CLKDIVbits.PLLPOST=0; /* N1 = 2 */
CLKDIVbits.PLLPRE=0; /* N2 = 2 */
__builtin_write_OSCCONH(0x01); /* New Oscillator FRC w/ PLL */
__builtin_write_OSCCONL(0x01); /* Enable Switch */
while(OSCCONbits.COSC != 0b001); /* Wait for new Oscillator to become FRC w/ PLL */
while(OSCCONbits.LOCK != 1); /* Wait for Pll to Lock */
/* Now setup the ADC and PWM clock for 120MHz
((FRC * 16) / APSTSCLR ) = (7.37 * 16) / 1 = ~ 120MHz*/
ACLKCONbits.FRCSEL = 1; /* FRC provides input for Auxiliary PLL (x16) */
ACLKCONbits.SELACLK = 1; /* Auxiliary Oscillator provides clock source for PWM & ADC */
ACLKCONbits.APSTSCLR = 7; /* Divide Auxiliary clock by 1 */
ACLKCONbits.ENAPLL = 1; /* Enable Auxiliary PLL */
while(ACLKCONbits.APLLCK != 1); /* Wait for Auxiliary PLL to Lock */
init_PWM();
while(1); /* Infinite Loop */
}
void init_PWM()
{
/* ~~~~~~~~~~~~~~~~~~~~~~ PWM1 Configuration ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
IOCON1bits.PENH = 1; /* PWM1H is controlled by PWM module */
IOCON1bits.PENL = 1; /* PWM1L is controlled by PWM module */
IOCON1bits.PMOD = 3; /* Select Independent Output PWM mode */
PWMCON1bits.CAM = 1; /* Select Center-aligned mode */
PWMCON1bits.ITB = 1; /* Select Independent timebase mode (required for
center-aligned mode) */
PHASE1 = 1202; /* In Center-aligned mode the effective period of
the PWM signal is twice of the value in the
PHASEx register. So to obtain signal of 400kHz
(or 2.5us period), the PHASE1 register should be
configured for a period of 1.25us.
PHASE1 = ((1.25us) / 1.04ns) = 1202. So effective
period is 2.5us. */
SPHASE1 = 1202; /* In Center-aligned mode the effective period of
the PWM signal is twice of the value in the
SPHASEx register. So to obtain signal of 400kHz
(or 2.5us period), the SPHASE1 register should be
configured for a period of 1.25us.
SPHASE1 = ((1.25us) / 1.04ns) = 1202. So effective
period is 2.5us. */
PDC1 = 601; /* In Center-aligned mode the effective duty cycle of
the PWM signal is twice of the value in the
PDCx register. To achieve 50% duty cycle configure
PDCx register to 0.625us.
PDC1 = ((0.625us) / 1.04ns) = 601. */
SDC1 = 301; /* In Center-aligned mode the effective duty cycle of
the PWM signal is twice of the value in the
SDCx register. To achieve 25% duty cycle configure
PDCx register to 0.312us.
PDC2 = ((0.312us) / 1.04ns) = 301. */
/* ~~~~~~~~~~~~~~~~~~~~~~ PWM2 Configuration ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
IOCON2bits.PENH = 1; /* PWM1H is controlled by PWM module */
IOCON2bits.PENL = 1; /* PWM1L is controlled by PWM module */
IOCON2bits.PMOD = 0; /* Select Complementary Output PWM mode */
PWMCON2bits.CAM = 1; /* Select Center-aligned mode */
PWMCON2bits.ITB = 1; /* Select Independent timebase mode (required for
center-aligned mode) */
ALTDTR2 = 63; /* ALTDeadtime = (65ns / 1.04ns) where 65ns is desired deadtime
When in center-aligned mode only use ALTDTRx */
PHASE2 = 1202; /* In Center-aligned mode the effective period of
the PWM signal is twice of the value in the
PHASEx register. So to obtain signal of 400kHz
(or 2.5us period), the PHASE1 register should be
configured for a period of 1.25us.
PHASE1 = ((1.25us) / 1.04ns) = 1202. So effective
period is 2.5us. */
PDC2 = 601; /* In Center-aligned mode the effective duty cycle of
the PWM signal is twice of the value in the
PDCx register. To achieve 50% duty cycle configure
PDCx register to 0.625us.
PDC1 = ((0.625us) / 1.04ns) = 601. */
PTCONbits.PTEN = 1; /* Enable the PWM Module */
}
dsPIC33F之Center_Aligned_PWM
最新推荐文章于 2024-03-05 18:08:16 发布