Cortex-A510——启动代码分析

Cortex-A510——启动代码分析

小狼@http://blog.youkuaiyun.com/xiaolangyangyang

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一、链接脚本

/*
 * Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#include <common/bl_common.ld.h>
#include <lib/xlat_tables/xlat_tables_defs.h>

OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
ENTRY(main_entrypoint)

MEMORY {
    RAM (rwx): ORIGIN = MAIN_BASE, LENGTH = MAIN_LIMIT - MAIN_BASE
}

SECTIONS
{
    . = MAIN_BASE;
    ASSERT(. == ALIGN(PAGE_SIZE),
           "MAIN_BASE address is not aligned on a page boundary.")

    .text . : {
        __TEXT_START__ = .;
        *main_entrypoint.o(.text*)
        *(SORT_BY_ALIGNMENT(.text*))
        *(.vectors)
        . = ALIGN(PAGE_SIZE);
        __TEXT_END__ = .;
     } >RAM

     /* .ARM.extab and .ARM.exidx are only added because Clang need them */
     .ARM.extab . : {
        *(.ARM.extab* .gnu.linkonce.armextab.*)
     } >RAM

     .ARM.exidx . : {
        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
     } >RAM

    .rodata . : {
        __RODATA_START__ = .;
        *(SORT_BY_ALIGNMENT(.rodata*))

	RODATA_COMMON

        . = ALIGN(PAGE_SIZE);
        __RODATA_END__ = .;
    } >RAM

    /*
     * Define a linker symbol to mark start of the RW memory area for this
     * image.
     */
    __RW_START__ = . ;

    DATA_SECTION >RAM
    STACK_SECTION >RAM
    BSS_SECTION >RAM
    XLAT_TABLE_SECTION >RAM

    /*
     * Define a linker symbol to mark end of the RW memory area for this
     * image.
     */
    __RW_END__ = .;
    __MAIN_END__ = .;

    __BSS_SIZE__ = SIZEOF(.bss);

    ASSERT(. <= MAIN_LIMIT, "MAIN image has exceeded its limit.")
}

二、启动代码

main_entrypoint.s

#include <arch.h>
#include <asm_macros.S>

    .globl  main_entrypoint

func main_entrypoint

    mov x20, x0
    mov x21, x1
    mov x22, x2
    mov x23, x3

    adr x0, early_exceptions
    msr vbar_el1, x0
    isb

    msr daifclr, #DAIF_ABT_BIT

    mov x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT)
    mrs x0, sctlr_el1
    orr x0, x0, x1
    bic x0, x0, #SCTLR_DSSBS_BIT
    msr sctlr_el1, x0
    isb

    adr x0, __RW_START__
    adr x1, __RW_END__
    sub x1, x1, x0
    bl  inv_dcache_range

    adrp    x0, __BSS_START__
    add x0, x0, :lo12:__BSS_START__
    adrp    x1, __BSS_END__
    add x1, x1, :lo12:__BSS_END__
    sub x1, x1, x0
    bl  zeromem

    bl  plat_set_my_stack

    mov	x0, x20
    mov	x1, x21
    mov	x2, x22
    mov	x3, x23
    bl  main_setup

    bl  main_main

    no_ret  plat_panic_handler

endfunc main_entrypoint

vector.s

    .align  11                          // 0x800
    .globl	vectors
vectors:
    .align  7                           /* Current EL Synchronous Thread */
    msr spsel, #0                       //set to SP_EL0
    stp x29, x30, [sp, #-16]!
    bl  _exception_entry
    bl  do_sync
    b   exception_exit

    .align  7                           /* Current EL IRQ Thread */
    stp x29, x30, [sp, #-16]!
    bl  _exception_entry
    bl  do_irq
    b   exception_exit

    .align  7                           /* Current EL FIQ Thread */
    msr spsel, #0
    stp x29, x30, [sp, #-16]!
    bl  _exception_entry
    bl  do_fiq
    b   exception_exit

    .align  7                           /* Current EL Error Thread */
    msr spsel, #0                       /* When Exception Triggered, SP Change To SP_ELx */
    stp x29, x30, [sp, #-16]!
    bl  _exception_entry
    bl  do_error
    b   exception_exit

A510启动时在EL3模式下，在main_entrypoint.s里VBAR_EL3=0，gic初始化时VBAR_EL3=0x800

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