UARTs

本文介绍了通用异步收发传输器(UART)的基本原理及功能结构。UART是一种将并行数据转换为串行数据进行传输,并将接收到的串行数据还原为并行数据的设备。文中详细解释了UART的发送与接收过程,以及异步传输中如何通过起始位和停止位实现数据同步。

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Figure 1 shows a functional diagram of a UART. It consists of two sections, a receiver (Rx) that converts a serial bit stream to parallel data for the microprocessor and a transmitter (Tx) that converts parallel data from a microprocessor into serial form for transmission. The UART also provides status information such as whether the receiver is full (data has arrived) or the transmitter is empty (a pending transmission has completed). Many microcontrollers incorporate UARTs on-chip, but for larger systems, the UART is often a separate device.

Figure 1. Functional diagram of a Universal Asynchronous Receiver Transmitter
figs/deh_1001.gif

Serial devices send data one bit at a time, so normal "parallel" data must first be converted to serial form before transfer. Serial transmission consists of breaking down bytes of data into single bits and shifting them out of the device one at a time. A UART's transmitter is essentially just a parallel-to-serial converter with extra features. The essence of the UART transmitter is a shift register that is loaded in parallel, and then each bit is sequentially shifted out of the device on each pulse of the serial clock. Conversely, the receiver accepts a serial bit stream into a shift register, and then this is read out in parallel by the processor.

UARTs actually predate semiconductor-based computers. In the early days of electrical communication, UARTs were mechanical devices with cogs, relays, and electromechanical shift registers. To adjust a UART's settings, you first picked up a wrench!

One of the problems associated with serial transmission is reconstructing the data at the receiving end. Difficulties arise in detecting boundaries between bits. For instance, if the serial line is low for a given length of time, the device receiving the data must be able to identify whether the stream represents 00 or 000. It has to know where one bit stops and the next starts. The transmitting and receiving devices can accomplish this by sharing a common clock. Hence, in a synchronous serial system, the serial data stream is synchronized with a clock that is transmitted along with the data stream. This simplifies the recovery of data but requires an extra signal line to carry the serial clock. Asynchronous serial devices, such as UARTs, do not share a common clock; rather, each device has its own, local clock. The devices must operate at exactly the same frequency, and additional logic is required to detect the phase of the transmitted data and phase-lock the receiver's clock to it.

Asynchronous transmission is used in systems in which one character is sent at a time, and the interval of time between each byte transmission may vary. The transmission format uses one start bit at the beginning and one or two stop bits at the end of each character (Figure 2). The receiver synchronizes its clock upon receiving the start bit and then samples the data bits (either seven or eight, depending on the system configuration). Upon receiving the stop bit(s) in the correct sequence, the receiver assumes that the transfer was successful and that it has a valid character. If it did not receive an appropriate stop sequence, the receiver assumes that its clock drifted out of phase and a framing error or bit-misalignment error is declared. It's up to the application software to check for such errors and take appropriate action.

Figure 2. Asynchronous serial data
figs/deh_1002.gif

The conversion from parallel to serial format is usually accomplished by dedicated UART hardware, but in systems in which only parallel I/O is available, the conversion may be performed by software, toggling a single bit of a parallel I/O port acting as the serial line.

 
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