/*
* helloworld.c: simple test application
*
* This application configures UART 16550 to baud rate 9600.
* PS7 UART (JFM_QL_PS) is not initialized by this application, since
* bootrom/bsp configures it to baud rate 115200
*
* ------------------------------------------------
* | UART TYPE BAUD RATE |
* ------------------------------------------------
* uartns550 9600
* uartlite Configurable only in HW design
* ps7_uart 115200 (configured by bsp)
*/
#include <stdio.h>
#include "platform.h"
#include "fmsh_common.h"
#include "ps_init.h"
#include "fmsh_print.h"
#include "cache.h"
#include "fmsh_gic.h"
#include "fmsh_common_io.h"
void test()
{
u32 i;
u32 ddr_test_data;
u32 true_cnt=0;
u32 erro_cnt=0;
u8 *p=(u8*)0x00100000;
u8 *m=(u8*)0x00100000;
init_platform();
icache_enable(); //初始化
#if (PSOC_MEMTEST_PRESSURE_CACHE_ENABLE == 1)
dcache_enable();
#endif
//initial PS_PL Port
FMSH_WriteReg(FPS_SLCR_BASEADDR,0x008,0xDF0D767BU);
FMSH_WriteReg(FPS_SLCR_BASEADDR,0x838,0xF);
FMSH_WriteReg(FPS_SLCR_BASEADDR,0x004,0xDF0D767BU);
// read axi lite data
//test DDR
fmsh_print("--------------------DDR3-Memory-Test--------------------\n\r");
for(i=0;i<((0x00100040-0x00100000)/4);i++){
FMSH_OUT32_32((0x01020304*i),*p);
p=p+4;
}
for(i=0;i<((0x00100040-0x00100000));i++){
ddr_test_data=FMSH_IN8_8(*m);
fmsh_print("ddr_test_data[%x]=0x%02x\n\r",m,ddr_test_data);
m=m+1;
}
}
int main()
{
delay_ms(1000);
while(1){
test();
delay_ms(1000);
}
return 0;
}
复旦微FMQL的DDR读写,32bit写,8bit读
于 2024-02-29 17:31:59 首次发布