OC(Open collector) 集电极开路


An open collector is a type of output on many integrated circuits (IC). Instead of outputting a signal of a specific voltage or current, the output signal is applied to the base of an internal NPN transistor whose collector is externalized (open) on a pin of the IC. The emitter of thetransistor is connected internally to the ground pin. If the output device is a MOSFET the output is called open drain and it functions in a similar way.


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[edit]Function

In the picture above, the transistor base is labeled "IC Output". This is an internal output from the internal IC logic to the transistor. From the point of view of the transistor, this is the input which controls the transistor switching. The external output is the transistor collector, and the transistor acts as an interface between the internal IC logic and parts external to the IC.

The output essentially acts as either an open circuit (no connection to anything) or a short circuit to ground. This is then usually connected to an external pull-up resistor, which sets the output to a voltage of line to which it is pulled-up when the transistor is opened. When any transistor connected to this resistor is closed, the output is forced to 0 volts. Open-collector outputs can be useful for analog weighting, summing, limiting, etc., but such applications are not discussed here.

A simplified schematic of the externalized (open) collector of an integrated circuit (IC).

[edit]Applications of open-collector devices

One useful property is that the pull-up resistor need not be connected to a voltage similar to that of the chip supply (Vcc); a lower or higher voltage can be used instead. Open collector circuits are therefore sometimes used to interface different families of devices that have different operating logic voltage levels or to control external circuitry that requires a higher voltage level (e.g. a 12 V relay).

Another advantage is that more than one open-collector output can be connected to a single line. If all outputs attached to the line are in the high-impedance (i.e., logic 1) state, the pull-up resistor will hold the wire in a high voltage state. If 1 or more of the device outputs are in the ground (i.e., logic 0) state, they will sink current and pull the line voltage near ground. Open-collector devices are commonly used to connect multiple devices to a bus (i.e., one carrying interrupt or write-enable signals). This enables one device to drive the bus without interference from the other inactive devices - if open-collector devices are not used, then the outputs of the inactive devices would attempt to hold the bus voltage high, resulting in unpredictable output.

By tying the output of several open collectors together, the common line becomes a "wired AND" (positive-true logic) or "wired OR" (negative-true logic) gate. A "wired AND" behaves like the boolean AND of the two (or more) gates in that it will be logic 1 whenever (all) are in the high impedance state, and 0 otherwise. A "wired OR" behaves like the boolean OR for negative-true logic, where the output is LOW if any one of its inputs is low. Such circuit constructions are termed "wired-AND" and "wired-OR", respectively.

One problem with open-collector devices is power consumption, as they tend to require higher current minimums for correct operation. Even in the 'off' state, they often have a few nanoamps of leakage current (the exact amount varies with temperature).

SCSI-1 devices use open collector for electrical signaling. [1] SCSI-2 and SCSI-3 may use EIA-485.

Active-low wired-OR / active-high wired-AND circuit using open-drain gates.


[edit]MOSFET

The word "drain" in the term "Open-drain" refers to the drain terminal of a MOSFET. (The analogous term for BJT devices is open collector.) Open-drain outputs can be useful for analog weighting, summing, limiting, etc., but only applications in digital logic will be discussed. An open drain terminal is connected to ground in the low voltage (logic 0) state, but has high impedance in the logic 1 state. This prohibits current flow, but as a result, such a device requires an external pull-up resistor connected to the positive voltage rail (logic 1).

Note that microelectronic devices using open drain signals (such as microcontrollers) may provide a 'weak' internal pull-up resistor to connect the terminal in question to a positive voltage source/rail like Vdd of the device. Such weak pullups, often on the order of 100 KOhms, reduce power usage by keeping input signals from floating. External pullups are stronger (perhaps 3 KOhms) to reduce signal rise times (as with I2C) or to minimize noise (as on system RESET inputs). Internal pullups can often be disabled for cases where there is an external one, or in other cases where they are not needed.



[edit]References

  1. ^ "Overview of SCSI Standards & Cables". 081214 scsita.org

[edit]External links

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### 集电极开路电路概述 集电极开路Open Collector, OC)是一种特殊的输出结构,在数字电路中广泛应用。其核心特点在于输出端仅连接三极管的集电极,而不直接连到电源或其他固定电位[^1]。这种设计使得输出可以灵活地与其他外部元件配合工作。 #### 工作原理 集电极开路电路通常由一个NPN型三极管构成,其中三极管的基极用于接收输入信号,发射极接地,而集电极作为输出端[^4]。具体工作过程如下: - 当输入信号为低电平(“0”)时,前级驱动三极管截止,此时集电极处于高阻态,无电流流过外接负载。 - 当输入信号为高电平(“1”)时,前级驱动三极管导通,后级三极管随之导通,集电极被拉至接近地电位,形成低电平输出。 为了实现完整的逻辑功能,通常会在集电极开路输出端外接一个上拉电阻,将其连接到所需的供电电压。这样可以在输入为“0”时提供高电平输出[^4]。 ```python # 模拟集电极开路电路的行为 def open_collector_output(input_signal, pull_up_voltage=5.0): if input_signal == 0: return pull_up_voltage # 上拉电阻作用下的高电平 elif input_signal == 1: return 0.0 # 输出短接到地的低电平 ``` #### 应用场景 集电极开路电路因其独特的电气特性,在许多实际应用中具有不可替代的作用: 1. **线与(Wired-AND)功能** 多个集电极开路输出可以通过共享同一根线路来实现逻辑“与”的功能。只要有一个输出为低电平,则整个线路呈现低电平状态[^1]。 2. **驱动能力增强** 利用外加上拉电阻的不同值,可调整输出电流的能力,从而适应不同的负载需求。这使其非常适合于驱动LED、继电器等需要较大电流的设备。 3. **兼容不同电压等级** 集电极开路输出能够轻松适配各种不同的供电电压范围,只需更换合适的上拉电阻即可满足特定的应用环境要求[^1]。 4. **通信接口设计** 在一些串行通信协议(如I²C)中,集电极开路技术被用来构建开放式的数据传输路径,允许多个设备共用相同的总线资源[^1]。 ### 总结 集电极开路电路凭借简单有效的设计理念以及广泛的适用性,在现代电子系统的设计中占据重要地位。无论是基础的逻辑运算还是复杂的外围控制,它都能发挥出色的表现。
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