Verilog实现Bresenham任意斜率直线

最新推荐文章于 2023-03-01 17:19:16 发布

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最新推荐文章于 2023-03-01 17:19:16 发布 · 1.1k 阅读

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本文介绍了如何使用Verilog语言实现Bresenham算法来绘制任意斜率的直线，包括斜率大于-1、小于-1、小于1、大于1、垂直和水平的情况。

Verilog实现Bresenham任意斜率直线

根据Bresenham算法原理：

简单修改后支持任意斜率直线：

reg [15:0] dx;
reg [15:0] dy;
reg signed [15:0] ix;
reg signed [15:0] iy;
reg signed [15:0] iw;
always @(posedge clk)
begin
    if (m_req == 1'b1) begin
        dx <= ($unsigned(addr_x1) > $unsigned(addr_x0))?($unsigned(addr_x1) - $unsigned(addr_x0)):($unsigned(addr_x0) - $unsigned(addr_x1));//求绝对值
        dy <= ($unsigned(addr_y1) > $unsigned(addr_y0))?($unsigned(addr_y1) - $unsigned(addr_y0)):($unsigned(addr_y0) - $unsigned(addr_y1));//求绝对值
        ix <= ($unsigned(addr_x1) > $unsigned(addr_x0))?1:-1;//x轴步进
        iy <= ($unsigned(addr_y1) > $unsigned(addr_y0))?1:-1;//y轴步进
        iw <= ($unsigned(addr_y1) > $unsigned(addr_y0))?1280:-1280; //图像为