Linux command --- lspci and setpci

1. lspci

it reads the information of the pci bus and device.

>sudo lspci -vvv

with parameter -vvv , it will show the device configure space and capabilities. For example:

Here is a bridge. First it has type1 configure space header as:

pci configure space type1 header

64:00.0 PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port 1A (rev 04) (prog-if 00 [Normal decode])
	Physical Slot: 6
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 30
	NUMA node: 0
	Bus: primary=64, secondary=65, subordinate=65, sec-latency=0
	I/O behind bridge: 0000f000-00000fff
	Memory behind bridge: b6000000-b61fffff
	Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
	BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Subsystem: Intel Corporation Sky Lake-E PCI Express Root Port A
	Capabilities: [60] MSI: Enable+ Count=1/2 Maskable+ 64bit-
		Address: fee01000  Data: 4021
		Masking: 00000002  Pending: 00000000
	Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 0
			ExtTag+ RBE+
		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
			RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 256 bytes, MaxReadReq 128 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #5, Speed 8GT/s, Width x16, ASPM L1, Exit Latency L0s <512ns, L1 <16us
			ClockPM- Surprise+ LLActRep+ BwNot+ ASPMOptComp+
		LnkCtl:	ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk+
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 8GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
			Slot #6, PowerLimit 0.000W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Off, PwrInd Off, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
			Changed: MRL- PresDet- LinkState+
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible+
		RootCap: CRSVisible+
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
		DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+
		DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd+
		LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
		LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete+, EqualizationPhase1+
			 EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-
	Capabilities: [e0] Power Management version 3
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D
标题 Pre-emphasis apparatus, low voltage differential signaling transmitter including the same and pre-emphasis method Pre-emphasis apparatus, low voltage differential signaling transmitter including the same and pre-emphasis method Pre-emphasis circuitry including a pre-emphasis voltage variation compensation engine Voltage regulator for impedance matching and pre-emphasis, method of regulating voltage for impedance matching and pre-emphasis, voltage mode driver including the voltage regulator, and voltage-mode driver using the method Pre-emphasis circuit and differential current signaling system having the same Pre-emphasis circuit and differential current signaling system having the same Semiconductor device with output driver pre-emphasis scheme Pre-emphasis circuit Pre-emphasis automatic adjusting system, method of adjusting pre-emphasis and pre-emphasis setting signal generating circuit Distributed pre-emphasis equalizer Pre-emphasis automatic adjusting system, method of adjusting pre-emphasis and pre-emphasis setting signal generating circuit DAC based driver with selectable pre-emphasis signal levels DAC based driver with selectable pre-emphasis signal levels Method and apparatus for performing transmit pre-emphasis Differential Data Transmitter With Pre-Emphasis Method of half-bit pre-emphasis for multi-level signal Method of Half-Bit Pre-Emphasis for Multi-Level Signal DAC based driver with selectable pre-emphasis signal levels DAC based driver with selectable pre-emphasis signal levels Phase-adjusted pre-emphasis and equalization for data communication Method and apparatus for increased communication channel pre-emphasis for clock-like data patterns Transmitters for loop-back adaptive pre-emphasis data transmission Method and apparatus for increased communication channel pre-emphasis for clock-like data patterns Semiconductor memory device having pre-emphasis signal generator Method and apparatus for performing transmit pre-emphasis System and method of gen
<think>好的,用户想了解PCI Express(PCIe)在Linux中的运用。首先,我需要先回顾PCIe的基本概念,确保自己理解正确。PCIe是一种高速串行计算机扩展总线标准,用于连接主板和外围设备,比如显卡、固态硬盘、网卡等。在Linux系统中,PCIe的管理涉及到硬件识别、驱动加载、资源分配等多个方面。 接下来,应该考虑用户可能的背景。用户可能是一位开发者、系统管理员,或者对Linux系统内部机制感兴趣的学习者。他们的需求可能是了解如何在Linux中配置PCIe设备,或者排除相关故障,或者开发驱动程序。因此,回答需要覆盖基础概念、管理工具、实际应用场景以及常见问题处理。 用户的问题比较广泛,可能需要分模块回答。首先介绍Linux中的PCI子系统,这是内核处理PCI/PCIe设备的核心部分。然后,常用的工具如lspcisetpci,这些工具帮助用户查看和配置设备。接着是驱动加载部分,说明内核如何自动或手动加载驱动。DMA和中断处理对性能的影响,这可能涉及到高级应用或优化。电源管理和热插拔功能,对于服务器或需要高可用性的环境很重要。虚拟化中的应用,比如PCIe直通,适用于云计算环境。最后,调试和故障排除的方法,帮助用户解决实际问题。 需要确保技术细节准确,比如lspci命令的输出示例,驱动模块的名称,sysfs中的路径等。同时,要避免过于深入内核机制,保持内容的实用性。可能用户遇到设备未被识别的情况,需要检查lspci输出,确认驱动是否正确加载,或者是否存在硬件问题。 另外,用户可能想知道如何手动绑定驱动到PCIe设备,或者如何调整PCIe的配置参数,比如设置最大负载大小。这些操作需要小心,因为错误的配置可能导致系统不稳定。在回答时,应提醒用户谨慎操作,并参考官方文档。 可能还需要提到与PCIe相关的内核参数,比如pci=assign-busses用于总线重新分配,或者使用pci=nomsi禁用MSI中断。这些高级设置对特定问题的解决有帮助,但需要用户具备一定的背景知识。 总结回答的结构,先概述PCIeLinux中的重要性,然后分点详细说明各个方面的应用,包括工具使用、驱动管理、性能优化、虚拟化支持等。最后给出常见问题的解决思路,帮助用户快速应用所学知识。确保语言通俗易懂,技术术语解释清楚,避免使用过多代码块,而是用自然的中文描述步骤和概念。</think>PCIe(Peripheral Component Interconnect Express)在 Linux 系统中的运用涉及硬件管理、驱动支持、性能优化等多个层面。以下是核心要点解析: --- ### **一、Linux PCI 子系统** 1. **内核架构** Linux 内核通过 **PCI 子系统** 统一管理 PCI/PCIe 设备: - 设备枚举:启动时通过 BIOS/UEFI 或内核直接扫描 PCIe 拓扑 - 资源配置:自动分配内存空间(BAR)、中断号(IRQ)等 - `/sys/bus/pci` 目录提供设备树形结构,如 `devices/0000:01:00.0` 表示一个 PCIe 设备 2. **核心工具** - **`lspci`**:查看 PCIe 设备列表 ```bash lspci -vvv # 显示详细信息(包括设备能力、驱动状态) lspci -t # 以树形结构显示设备层级 ``` - **`setpci`**:直接修改 PCI 配置空间(需谨慎操作) ```bash setpci -s 01:00.0 COMMAND=0x02 # 禁用设备DMA ``` --- ### **二、驱动加载与管理** 1. **自动匹配** 内核通过 **PCI ID 表**(`vendor:device`)自动加载驱动: - 驱动注册时声明支持的设备ID,如 NVIDIA 显卡驱动包含 `10de:2204`(Vendor ID 10de = NVIDIA) - 驱动绑定状态可通过 `/sys/bus/pci/devices/0000:01:00.0/driver` 查看 2. **手动干预** - 强制绑定驱动: ```bash echo 0000:01:00.0 > /sys/bus/pci/drivers/nvidia/bind ``` - 卸载驱动: ```bash echo 0000:01:00.0 > /sys/bus/pci/drivers/nvidia/unbind ``` --- ### **三、性能关键功能** 1. **DMA 与 IOMMU** - DMA 重映射:通过 **IOMMU** 防止恶意设备访问非法内存 启用命令(需硬件支持): ```bash intel_iommu=on iommu=pt # 添加到内核启动参数 ``` - 查看 IOMMU 分组: ```bash dmesg | grep -i iommu ``` 2. **中断优化** - **MSI/MSI-X**:现代 PCIe 设备使用基于消息的中断,减少延迟 查看中断类型: ```bash lspci -vvv | grep MSI ``` --- ### **四、高级应用场景** 1. **SR-IOV 虚拟化** - 单物理设备虚拟为多个虚拟功能(VF) 启用示例(以网卡为例): ```bash echo 4 > /sys/class/net/ens1f0/device/sriov_numvfs # 创建4个VF ``` 2. **PCIe 热插拔** - 动态添加/移除设备(需内核支持 `CONFIG_HOTPLUG_PCI`) 触发设备移除: ```bash echo 1 > /sys/bus/pci/devices/0000:01:00.0/remove ``` --- ### **五、调试与故障处理** 1. **常见问题排查** - 设备未识别: - 检查 `dmesg` 输出是否有 PCIe 链路训练错误 - 验证 `lspci` 能否看到设备 - 性能瓶颈: - 使用 `perf` 分析中断频率 - 检查 `lspci -vvv` 中设备协商的链路速度(如 Gen3 x4) 2. **内核调试参数** ```bash pci=realloc=off # 禁用内存重分配(解决某些BAR冲突) pcie_aspm=off # 关闭节能模式(可能提升稳定性) ``` --- ### **六、典型应用案例** - **NVMe SSD**:依赖 `nvme` 驱动,通过 PCIe 实现低延迟存储 - **GPU 加速**:NVIDIA/AMD 显卡通过专有驱动(`nvidia.ko`, `amdgpu.ko`)利用 PCIe 带宽 - **高速网卡**:如 Mellanox ConnectX 系列使用 RDMA over PCIe --- 通过上述机制,Linux 实现了对 PCIe 设备的全生命周期管理,从硬件检测到高性能数据传输,支持从嵌入式设备到数据中心服务器的多种场景。
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