记录max9286相关寄存器，以免忘记
//正确配置代码
u8 max9286_4camera_init_setting_new[] = {
// max9286 config
//这些硬件配置需要加串器和解串器端一致 BWS=0 CX/TP=1 I2CSEL=1 HIM=1 MS/HVEN=1
0x03, DSR_I2C_DEF, 0x1C, 0xF4,// HIBW=1
0x00, 0x64, //delay
0x03, DSR_I2C_DEF, 0x0C, 0x99,// HVEN=1 ,vsyc/hsync polarity
0x03, DSR_I2C_DEF, 0x15, 0x03,// Disable CSI output
0x03, DSR_I2C_DEF, 0x63, 0x00,// Disable overlap windlow as
// relationship will be broken between
// Fsync & returning Vsync
// [7:0] OVLP_WINDOWL
0x03, DSR_I2C_DEF, 0x64, 0x00,// After Vsync timing regeneration
// Vsync does not return within this
// many PCLKs.
// [7:6] RSVD
// [5] ENFSINLAST = 0 - FSIN occurs
// anytime between VS rising edge
// [4:0] OVLP_WINDOWH
// OVLP_WINDOW = 0 (disabled)
0x03, DSR_I2C_DEF, 0x69, 0x30,
0x03, DSR_I2C_DEF, 0x12, 0x73, //2lane// DBL=1, CSI_DBL=1 使能DBL，设置mipi lane数，设置数据格式为YUV422
// CSI Lanes, CSI DBL, GMSL DBL,
// Data Type
// [7:6] Enable CSI-2 Lanes D0
// [5] Enable CSI-2 DBL
// [4] Enable GMSL DBL for RAWx2
// [3:0] Enable RAW11/RAW12
//0x03, DSR_I2C_DEF, 0x0B, 0xE1, //default E4, link0 first
// camera 1
0x03, DSR_I2C_DEF, 0x00, 0xE1, // Enable GMSL Links
// [7:5] Master Link Select = AUTO
// [4] Disable Internal
// VSYNC generation
// (VSYNC comes from camera)
// [3] Enable LINK3
// [2] Enable LINK2
// [1] Enable LINK1
// [0] Enable LINK0
//
// Reference MAX9286 Fsync Guide
//
0x00, 0x64,
0x00, 0x64,
0x00, 0x64,
0x03, SER_I2C_DEF, 0x04, 0x43,// Enable Configuration Link 加串器端是能configuration link
0x00, 0x64,
0x03, SER_I2C_DEF, 0x07, 0x84,// 加串器端 DBL=1，HVEN=1
0x00, 0x64,
0x03, SER_I2C_DEF, 0x00, 0x82,//加串器i2c地址
0x00, 0x64,
0x03, SER_I2C_LK0, 0x47, 0x42,// [7:0] VS_H[23:16] VSYNC High: VS high period in terms of PCLK cycles
0x03, SER_I2C_LK0, 0x48, 0x14,// [7:0] VS_H[15:8]
0x03, SER_I2C_LK0, 0x49, 0xa8,// [7:0] VS_H[7:0]
0x03, SER_I2C_LK0, 0x4A, 0x03,// VSYNC Low: VS low period in terms of PCLK
0x03, SER_I2C_LK0, 0x4B, 0x00,
0x03, SER_I2C_LK0, 0x4C, 0x00,
0x03, SER_I2C_LK0, 0x43, 0x25,// enable vsync re-gen
// [7] RSVD = 0
// [6] RSVD = 0
// [5] GEN_VS = 1
// enable VS output generation
// (VS internally generated)
// [4] GEN_HS = 0
// disable HS output generation
// (HS used from input)
// [3] GEN_DE = 0
// disable DE output generation
// (DE used from input)
// [2] VS_TRIG = 1
// VS trigger uses rising edge
// [1:0] VTG_MODE = 1
// VS edge triggers one VS frame
// (current frame is extended/cut
// shfot to adjust timing to net
// trigger)
//
0x03, SER_I2C_LK0, 0x20, 0x07,//crossbar
0x03, SER_I2C_LK0, 0x21, 0x06,
0x03, SER_I2C_LK0, 0x22, 0x05,
0x03, SER_I2C_LK0, 0x23, 0x04,
0x03, SER_I2C_LK0, 0x24, 0x03,
0x03, SER_I2C_LK0, 0x25, 0x02,
0x03, SER_I2C_LK0, 0x26, 0x01,
0x03, SER_I2C_LK0, 0x27, 0x00,
0x03, SER_I2C_LK0, 0x30, 0x17,
0x03, SER_I2C_LK0, 0x31, 0x16,
0x03, SER_I2C_LK0, 0x32, 0x15,
0x03, SER_I2C_LK0, 0x33, 0x14,
0x03, SER_I2C_LK0, 0x34, 0x13,
0x03, SER_I2C_LK0, 0x35, 0x12,
0x03, SER_I2C_LK0, 0x36, 0x11,
0x03, SER_I2C_LK0, 0x37, 0x10,
// camera 2
0x03, DSR_I2C_DEF, 0x00, 0xE2,
0x00, 0x64,
0x00, 0x64,
0x00, 0x64,
0x03, SER_I2C_DEF, 0x04, 0x43,
0x00, 0x64,
0x03, SER_I2C_DEF, 0x07, 0x84,
0x00, 0x64,
0x03, SER_I2C_DEF, 0x00, 0x84,
0x00, 0x64,
0x03, SER_I2C_LK1, 0x47, 0x42,
0x03, SER_I2C_LK1, 0x48, 0x14,
0x03, SER_I2C_LK1, 0x49, 0xa8,
0x03, SER_I2C_LK1, 0x4A, 0x03,
0x03, SER_I2C_LK1, 0x4B, 0x00,
0x03, SER_I2C_LK1, 0x4C, 0x00,
0x03, SER_I2C_LK1, 0x43, 0x25,
0x03, SER_I2C_LK1, 0x20, 0x07,
0x03, SER_I2C_LK1, 0x21, 0x06,
0x03, SER_I2C_LK1, 0x22, 0x05,
0x03, SER_I2C_LK1, 0x23, 0x04,
0x03, SER_I2C_LK1, 0x24, 0x03,
0x03, SER_I2C_LK1, 0x25, 0x02,
0x03, SER_I2C_LK1, 0x26, 0x01,
0x03, SER_I2C_LK1, 0x27, 0x00,
0x03, SER_I2C_LK1, 0x30, 0x17,
0x03, SER_I2C_LK1, 0x31, 0x16,
0x03, SER_I2C_LK1, 0x32, 0x15,
0x03, SER_I2C_LK1, 0x33, 0x14,
0x03, SER_I2C_LK1, 0x34, 0x13,
0x03, SER_I2C_LK1, 0x35, 0x12,
0x03, SER_I2C_LK1, 0x36, 0x11,
0x03, SER_I2C_LK1, 0x37, 0x10,
// camera 3
0x03, DSR_I2C_DEF, 0x00, 0xE4,
0x00, 0x64,
0x00, 0x64,
0x00, 0x64,
0x03, SER_I2C_DEF, 0x04, 0x43,
0x00, 0x64,
0x03, SER_I2C_DEF, 0x07, 0x84,
0x00, 0x64,
0x03, SER_I2C_DEF, 0x00, 0x86,
0x00, 0x64,
0x03, SER_I2C_LK2, 0x47, 0x42,
0x03, SER_I2C_LK2, 0x48, 0x14,
0x03, SER_I2C_LK2, 0x49, 0xa8,
0x03, SER_I2C_LK2, 0x4A, 0x03,
0x03, SER_I2C_LK2, 0x4B, 0x00,
0x03, SER_I2C_LK2, 0x4C, 0x00,
0x03, SER_I2C_LK2, 0x43, 0x25,
0x03, SER_I2C_LK2, 0x20, 0x07,
0x03, SER_I2C_LK2, 0x21, 0x06,
0x03, SER_I2C_LK2, 0x22, 0x05,
0x03, SER_I2C_LK2, 0x23, 0x04,
0x03, SER_I2C_LK2, 0x24, 0x03,
0x03, SER_I2C_LK2, 0x25, 0x02,
0x03, SER_I2C_LK2, 0x26, 0x01,
0x03, SER_I2C_LK2, 0x27, 0x00,
0x03, SER_I2C_LK2, 0x30, 0x17,
0x03, SER_I2C_LK2, 0x31, 0x16,
0x03, SER_I2C_LK2, 0x32, 0x15,
0x03, SER_I2C_LK2, 0x33, 0x14,
0x03, SER_I2C_LK2, 0x34, 0x13,
0x03, SER_I2C_LK2, 0x35, 0x12,
0x03, SER_I2C_LK2, 0x36, 0x11,
0x03, SER_I2C_LK2, 0x37, 0x10,
// camera 4
0x03, DSR_I2C_DEF, 0x00, 0xE8,
0x00, 0x64,
0x00, 0x64,
0x00, 0x64,
0x03, SER_I2C_DEF, 0x04, 0x43,
0x00, 0x64,
0x03, SER_I2C_DEF, 0x07, 0x84,
0x00, 0x64,
0x03, SER_I2C_DEF, 0x00, 0x88,
0x00, 0x64,
0x03, SER_I2C_LK3, 0x47, 0x42,
0x03, SER_I2C_LK3, 0x48, 0x14,
0x03, SER_I2C_LK3, 0x49, 0xa8,
0x03, SER_I2C_LK3, 0x4A, 0x03,
0x03, SER_I2C_LK3, 0x4B, 0x00,
0x03, SER_I2C_LK3, 0x4C, 0x00,
0x03, SER_I2C_LK3, 0x43, 0x25,
0x03, SER_I2C_LK3, 0x20, 0x07,
0x03, SER_I2C_LK3, 0x21, 0x06,
0x03, SER_I2C_LK3, 0x22, 0x05,
0x03, SER_I2C_LK3, 0x23, 0x04,
0x03, SER_I2C_LK3, 0x24, 0x03,
0x03, SER_I2C_LK3, 0x25, 0x02,
0x03, SER_I2C_LK3, 0x26, 0x01,
0x03, SER_I2C_LK3, 0x27, 0x00,
0x03, SER_I2C_LK3, 0x30, 0x17,
0x03, SER_I2C_LK3, 0x31, 0x16,
0x03, SER_I2C_LK3, 0x32, 0x15,
0x03, SER_I2C_LK3, 0x33, 0x14,
0x03, SER_I2C_LK3, 0x34, 0x13,
0x03, SER_I2C_LK3, 0x35, 0x12,
0x03, SER_I2C_LK3, 0x36, 0x11,
0x03, SER_I2C_LK3, 0x37, 0x10,
// enable mipi
0x03, DSR_I2C_DEF, 0x00, 0xFF,
0x00, 0x64,
0x03, DSR_I2C_DEF, 0x15, 0x13, // disable csi2 output
0x00, 0x64,
0x03, SER_I2C_LK0, 0x04, 0x87,// enable link0 serializer
0x00, 0x64,
0x03, SER_I2C_LK1, 0x04, 0x87,// enable link1 serializer
0x00, 0x64,
0x03, SER_I2C_LK2, 0x04, 0x87,
0x00, 0x64,
0x03, SER_I2C_LK3, 0x04, 0x87,
0x00, 0x64,
0x03, DSR_I2C_DEF, 0x06, 0xa8,// [7:0] FSYNC_PERIODL
0x03, DSR_I2C_DEF, 0x07, 0x14,// [7:0] FSYNC_PERIODM
0x03, DSR_I2C_DEF, 0x08, 0x45,// [7:0] FSYNC_PERIODH
// FSYNC_PERIOD = 0x4514a8 =
// 4527272 cycles / 27MHz =
// 0.0333 => 30fps
//
0x03, DSR_I2C_DEF, 0x01, 0x00,
0xFF
};
max96712
static const struct regval max96712_mipi_init[] = {
// Setup MAX9295A -> MAX96712A --MIPI PORT A
{0x6B,0x040b,0x00,0x00},//Disable MIPI CSI-2
// Link Initiaion
{0x6B,0x0006,0xFF,0xc8}, // Enable all 4 Links in GMSL2 mode
// Video Pipe Selection 默认值不用改
//{0x6B,0x00F0,0x62,0x00}, //40/62 // pipe X in link B to video pipe 1, pipe X in link A to video pipe 0
//{0x6B,0x00F1,0xea,0x00}, //ea/c8 // pipe X in link D to video pipe 3, pipe X in link C to video pipe 2
{0x6B,0x00F4,0x0F,0x00}, // Turn on 4 pipes
{0x6B,0x0947,0x1F,0x00},
// Efficiency updates (disable HEARTBEAT Mode) for image data pipes 0-3 不用配
//{0x6B,0x0106,0x0A,0x00},
//{0x6B,0x0118,0x0A,0x00},
//{0x6B,0x012A,0x0A,0x00},
//{0x6B,0x013C,0x0A,0x00},
// YUV422 8bit, video pipe 0, map FS/FE （4个pipe 数据进到Controller 1 都在portA输出）
{0x6B,0x090B,0x07,0x00},
{0x6B,0x092D,0x15,0x00}, // map to MIPI Controller 1
{0x6B,0x090D,0x1e,0x00},
{0x6B,0x090E,0x1e,0x00}, // map to VC0
{0x6B,0x090F,0x00,0x00},
{0x6B,0x0910,0x00,0x00},
{0x6B,0x0911,0x01,0x00},
{0x6B,0x0912,0x01,0x00},
// YUV422 8bit, video pipe 1, map FS/FE
{0x6B,0x094B,0x07,0x00},
{0x6B,0x096D,0x15,0x00}, // map to MIPI Controller 1
{0x6B,0x094D,0x1e,0x00},
{0x6B,0x094E,0x5e,0x00}, // map to VC1
{0x6B,0x094F,0x00,0x00}, // frame start
{0x6B,0x0950,0x40,0x00},
{0x6B,0x0951,0x01,0x00},
{0x6B,0x0952,0x41,0x00},
// YUV422 8bit, video pipe 2, map FS/FE
{0x6B,0x098B,0x07,0x00},
{0x6B,0x09AD,0x15,0x00}, // map to MIPI Controller 1
{0x6B,0x098D,0x1e,0x00},
{0x6B,0x098E,0x9e,0x00}, // map to VC2
{0x6B,0x098F,0x00,0x00},
{0x6B,0x0990,0x80,0x00},
{0x6B,0x0991,0x01,0x00},
{0x6B,0x0992,0x81,0x00},
// YUV422 8bit, video pipe 3, map FS/FE
{0x6B,0x09CB,0x07,0x00},
{0x6B,0x09ED,0x15,0x00}, // map to MIPI Controller 1
{0x6B,0x09CD,0x1e,0x00},
{0x6B,0x09CE,0xde,0x00}, // map to VC3
{0x6B,0x09CF,0x00,0x00},
{0x6B,0x09D0,0xC0,0x00},
{0x6B,0x09D1,0x01,0x00},
{0x6B,0x09D2,0xC1,0xff},
// MIPI PHY Setting
// Set Des in 2x4 mode 默认值 //change to 4x2 config(four 2lane)
{0x6B,0x08A0,0x04,0x00},
{0x6B,0x08A3,0xE4,0x00}, // change map D0 --> lane D0, D1 --> lane D1
{0x6B,0x08A4,0xE4,0x00},
// Set 4 lane D-PHY 默认值
{0x6B,0x090A,0x40,0x00}, // change 2lane
{0x6B,0x094A,0x40,0x00},
{0x6B,0x098A,0x40,0x00},
{0x6B,0x09CA,0x40,0x00},
// Turn on MIPI PHYs
{0x6B,0x08A2,0xF4,0x00},
// Set Data rate to be 1500Mbps/lane for port A and enable software override
//{0x6B,0x0415,0x2F,0x00},
{0x6B,0x0418,0x2C,0x00}, //（默认portA）1.2G
//{0x6B,0x0947,0x4c,0x00},
//{0x6B,0x041b,0x2F,0x00},
//{0x6B,0x041e,0x2F,0x00},
{0x6B,0xF0,0xE6,0x00},
{0x6B,0xF1,0x00,0x00},
// ------------- I2C translation table update -------------
#if 0
// Enable Link A only （默认走pipeZ）
{0x6B,0x0006,0xF1,0xff}, // Turn on GMSL2 mode for link A
//{0x00,0x00,0x00,0x00},
//set MAX9295
//0x04,0x80,0x00,0x57,0x02,//change stream ID 2
//0x04,0x80,0x00,0x5b,0x01,//change stream ID 1
{0x40,0x02BE,0x00,0x20},
{0x40,0x02BE,0x10,0x00},// camera reset
{0x40,0x0318,0x5e,0x00},//set DT
{0x40,0x02d3,0x00,0xff},
{0x00,0x00,0x00,0x00},
{0x40,0x02d3,0x10,0x00},
{0x40,0x0000,0x82,0x00}, // Change I2C address for this Link A serializer
#endif
// Enable Link B only
{0x6B,0x0006,0xF2,0xff}, // Turn on GMSL2 mode for link B
//set MAX9295
//0x04,0x80,0x00,0x57,0x02,//change stream ID 2
//0x04,0x80,0x00,0x5b,0x01,//change stream ID 1
{0x40,0x02BE,0x10,0x00},// camera reset
{0x40,0x0318,0x5e,0x00},//set DT
{0x40,0x02d3,0x00,0xff},
{0x40,0x02d3,0x10,0x00},
{0x40,0x0000,0x84,0x05}, // Change I2C address for this Link A serializer
#if 0
// Enable Link C only
{0x6B,0x0006,0xF4,0x32}, // Turn on GMSL2 mode for link C
//set MAX9295
//0x04,0x40,0x00,0x57,0x02,//change stream ID 2
//0x04,0x40,0x00,0x5b,0x01,//change stream ID 1
{0x40,0x02BE,0x10,0x00},// camera reset
{0x40,0x0318,0x5e,0x00},//set DT
{0x40,0x02d3,0x00,0xAa},
{0x40,0x02d3,0x10,0x00},
{0x40,0x0000,0x86,0x00}, // Change I2C address for this Link A serializer
#endif
// Enable Link D only
{0x6B,0x0006,0xF8,0xff}, // Turn on GMSL2 mode for link D
//set MAX9295
//0x04,0x40,0x00,0x57,0x02,//change stream ID 2
//0x04,0x40,0x00,0x5b,0x01,//change stream ID 1
{0x40,0x02BE,0x10,0x00},// camera reset
{0x40,0x0318,0x5e,0x00},//set DT
{0x40,0x02d3,0x00,0xff},
{0x40,0x02d3,0x10,0x00},
{0x40,0x0000,0x88,0x05}, // Change I2C address for this Link A serializer
{0x6B,0x0006,0xFA,0x00}, // Enable all links back //change to enable link A & B
{0x6B,0x0018,0x0F,0xff}, // One-shot link reset for all links
//{0x00,0x00,0x00,0x00},
// End of Script
//0x32, // Delay 500ms
// Enable MIPI Output
//{0x6B,0x040B,0x02,0x00},
//{0x6B,0x08A0,0x84,0x00},
{0x6b, REG_NULL, 0x00, 0x00},
};
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