root@(sx25v2):~# cat /sys/firmware/fdt
▒▒▒8▒▒(▒▒FORD SSC029C-S01A
!sstar,ifordcpuscpu@0,cpu!arm,cortex-a328;▒▒HOScpu@1,cpu!arm,cortex-a328;▒▒HOopp_table0!operating-points-v2gropp0z;▒▒
▒▒okoscillator
!fixed-clock▒8n6r▒aliases▒/soc/uart0@1F221000▒/soc/uart0@1F221000▒/soc/uart1@1F221200▒/soc/fuart@1F220400▒/soc/pm_fuart@1F006C00▒/soc/pm_fuart1@1F00A400▒/soc/sstar_sdmmc0▒/soc/sstar_sdmmc1soc
!simple-bus▒▒gic@16000000
!arm,gic-v3▒
4rsstar_main_intc!sstar,main-intc▒▒
rsstar_pm_main_intc!sstar,pm-main-intc▒▒
K00▒okr▒sstar_pm_gpi_intc!sstar,pm-gpi-intc▒▒
K"r▒sstar_gpi_intc!sstar,gpi-intc▒▒
KXr▒arch_timer%!arm,cortex-a32-timerarm,armv8-timer▒0K 8[▒▒pmu!arm,cortex-a53-pmu▒0K
clocks▒r▒CLK_VOID▒
!fixed-clock8rMCLK_upll_960m▒!sstar,complex-clockHVrCLK_upll_480m▒!sstar,complex-clockHrCLK_mpll_432m▒
!fixed-clock8▒▒r
CLK_upll_384m▒!sstar,complex-clockHCLK_mpll_345m▒
!fixed-clock8▒H@r7CLK_upll_320m▒!sstar,complex-clockHr CLK_mpll_288m▒
!fixed-clock8*▒r
CLK_mpll_216m▒
!fixed-clock8
▒▒rCLK_mpll_172m▒
!fixed-clock8
@▒r%CLK_mpll_123m▒
!fixed-clock8Z▒@r
CLK_mpll_86m▒
CLK_upll_480m_div2▒!fixed-factor-clockHakr6CLK_upll_384m_div2▒!fixed-factor-clockakr-CLK_upll_320m_div2▒!fixed-factor-clockH akr>CLK_mpll_288m_div2▒!fixed-factor-clockH
akr&CLK_mpll_288m_div4▒!fixed-factor-clockH
akr+CLK_mpll_288m_div8▒!fixed-factor-clockH
kr2CLK_mpll_432m_div4▒!fixed-factor-clockH
akr!CLK_mpll_432m_div8▒!fixed-factor-clockH
kr,CLK_mpll_432m_div16▒!fixed-factor-clockH
akr.CLK_mpll_123m_div2▒!fixed-factor-clockH
akr4CLK_upll_384m_div8▒!fixed-factor-clockkr0CLK_upll_320m_div8▒!fixed-factor-clockH kr9CLK_upll_320m_div10▒!fixed-factor-clockH a
kr:CLK_upll_320m_div16▒!fixed-factor-clockH akr;CLK_disppll_clk▒!sstar,complex-clockH
ZrCLK_disppll_clk_div2▒!fixed-factor-clockHakr?CLK_xtali_12m▒
!fixed-clock8▒CLK_xtali_12m_div2▒!fixed-factor-clockHakr#CLK_xtali_12m_div4▒!fixed-factor-clockHakr$CLK_xtali_12m_div8▒!fixed-factor-clockHkrCLK_xtali_12m_div16▒!fixed-factor-clockHakrCLK_xtali_12m_div40▒!fixed-factor-clockHa(kr<CLK_xtali_12m_div64▒!fixed-factor-clockHa@krCLK_xtali_12m_div128▒!fixed-factor-clockHa▒kr CLK_xtali_24m▒
!fixed-clock8n6rCLK_CLK_12M_CORE_v_live▒
!fixed-clock8▒ACLK_RTC_CLK_32K▒
!fixed-clock8}rLCLK_pm_riu_w_clk_in▒
!fixed-clock8}r▒CLK_ipupll_clk▒!sstar,complex-clockH
rlCLK_miupll_clk▒!sstar,complex-clockHrCLK_cpu_pll▒!sstar,complex-clockH
rCLK_armpll_37p125m▒!sstar,complex-clockHr5CLK_riu_w_clk_in▒!fixed-factor-clockHakr▒CLK_riu_w_clk_top▒!fixed-factor-clockHakr▒CLK_riu_w_clk_sc_gp▒!fixed-factor-clockHakr▒CLK_riu_w_clk_vhe_gp▒!fixed-factor-clockHakr▒CLK_riu_w_clk_hemcu_gp▒!fixed-factor-clockHakr▒CLK_riu_w_clk_mipi_if_gp▒!fixed-factor-clockHakr▒CLK_riu_w_clk_mcu_if_gp▒!fixed-factor-clockHakr▒CLK_spi_synth_pll▒!sstar,complex-clockH
r*CLK_fuart_synth_out▒!sstar,complex-clockHr'CLK_fuart0_synth_out▒!sstar,complex-clockHr(CLK_fuart1_synth_out▒!sstar,complex-clockHr)CLK_miu_p▒!fixed-factor-clockHakrKCLK_mspi0_p▒!fixed-factor-clockHakr~CLK_miu_vhe_gp_p▒!fixed-factor-clockHakr}CLK_miu_sc_gp_p▒!fixed-factor-clockHakr|CLK_miu_isp_gp_p▒!fixed-factor-clockHakrzCLK_miu2x_p▒!fixed-factor-clockHakryCLK_mcu_p▒!fixed-factor-clockHakr"CLK_mcu_pm_p▒!fixed-factor-clockHakrtCLK_isp_p▒!fixed-factor-clockHakrnCLK_fclk1_p▒!fixed-factor-clockHakrdCLK_fclk2_p▒!fixed-factor-clockHakreCLK_otp_p▒
!fixed-clock8▒8CLK_bist_pm_p▒
!fixed-clock8
q▒rBCLK_sr_mclk▒
!fixed-clock8xh▒r▒CLK_emac_testrx125_in_lan▒
!fixed-clock8sY@r@CLK_source_mux_250m▒!fixed-factor-clockHakrCLK_source_mux_250m_div2▒!fixed-factor-clockHakrDCLK_source_mux_250m_div4▒!fixed-factor-clockHakrECLK_source_mux_250m_div5▒!fixed-factor-clockHakrFCLK_source_mux_250m_div6▒!fixed-factor-clockHakrGCLK_source_mux_250m_div8▒!fixed-factor-clockHkrICLK_12m_mux▒
!fixed-clock8▒LK_12m_mux_div2▒!fixed-factor-clockHkrJCLK_12m_mux_div40▒!fixed-factor-clockH(krHCLK_24m_mux▒
!fixed-clock8n6rCCLK_rtcpll_clk▒
!fixed-clock8
▒▒rCLK_ddr_syn▒!sstar,composite-clock
H
O pdv▒▒▒r_CLK_miu_rec▒!sstar,composite-clockHO p`v▒▒▒r{CLK_mcu▒!sstar,composite-clockH
O pv▒▒▒V▒rCLK_riubrdg▒!sstar,composite-clockHO pv O p▒vCLK_pwm▒!sstar,composite-clockH#$
▒Zr▒CLK_fuart_synth_in▒!sstar,composite-clocH
O p▒v▒▒▒rCLK_fuart0_synth_in▒!sstar,composite-clocH
O p▒v▒▒▒rCLK_fuart1_synth_in▒!sstar,composite-clocH
O p▒v▒▒▒rCLK_fuart▒!sstar,composite-clockH%&O p▒v▒▒▒rfCLK_fuart0▒!sstar,composite-clockH%&O p▒v▒▒▒rgCLK_fuart1▒!sstar,composite-clockH%&O p▒v▒▒▒rhCLK_mspi0▒!sstar,composite-clockH!&O p▒v▒▒▒rCLK_miic0▒!sstar,composite-clock
H+O p▒v▒▒▒rvCLK_miic1▒!sstar,composite-clock
H+O p▒v
▒▒rwCLK_miic2▒!sstar,composite-clock
H+O p▒v▒▒
▒rxCLK_bist▒!sstar,composite-clockH
O v▒▒
▒rQCLK_bist_pm▒!sstar,composite-clockH-
&v▒▒▒rVCLK_bist_mcu▒!sstar,composite-clockH
O p$v▒▒▒rTCLK_pwr_ctl▒!sstar,composite-clock
O pv▒▒▒r▒CLK_xtali▒!sstar,composite-clockO pv▒▒▒r▒CLK_live_c▒!sstar,composite-clockO pv
▒▒rsCLK_live▒!sstar,composite-clockO pv
▒▒rrCLK_sr00_mclk▒!sstar,composite-clock0H.+/,012345O q▒ q▒v
▒▒▒r▒CLK_sr01_mclk▒!sstar,composite-clock0H.+/,012345O q▒ q▒v▒▒▒▒r▒CLK_sr02_mclk▒!sstar,composite-clock0H.+/,012345O q▒ q▒v
▒▒▒r▒CLK_sr03_mclk▒!sstar,composite-clock0H.+/,012345O q▒ q▒v
▒▒▒r▒CLK_bist_ipu_gp▒!sstar,composite-clockH
O pv▒▒▒rRCLK_ipu▒!sstar,composite-clockH
O q@v▒▒▒rjCLK_ipuff▒!sstar,composite-clockH
O q@v
▒▒rkCLK_hemcu▒!sstar,composite-clocH
O p▒v▒▒▒riCLK_csi0_mac_lptx_top_i▒!sstar,composite-clockH
%O q` q▒v▒▒▒▒rYCLK_csi0_mac_top_i▒!sstar,composite-clockH
%O q` q▒v
▒▒▒▒rZCLK_csi0_ns_top_i▒!sstar,composite-clockH
%O qd q▒v▒▒▒▒r[CLK_csi1_mac_lptx_top_i▒!sstar,composite-clockH
%O qd q▒v
▒▒▒r\CLK_csi1_mac_top_i▒!sstar,composite-clockH
%O qh q▒v▒▒▒▒r]CLK_csi1_ns_top_i▒!sstar,composite-clockH
%O qh q▒v
▒▒▒▒r^CLK_bist_vhe_gp▒!sstar,composite-clockH
O p
v
▒▒rXCLK_vhe▒!sstar,composite-clock H67
-O q▒ ~▒v▒▒▒▒▒▒▒r▒CLK_mfe▒!sstar,composite-clock H
7&O q▒ ~▒v▒▒▒▒▒▒▒ruCLK_ven_axi▒!sstar,composite-clock H67
-O q▒ ~▒v
▒▒▒▒▒r▒CLK_ven_scdn▒!sstar,composite-clock H67
-O▒▒v▒▒▒▒▒▒▒r▒CLK_ven_sc_if▒!sstar,composite-clockH!
O ~H ~▒v
▒▒▒r▒CLK_xtali_sc_gp▒!sstar,composite-clockO pv▒▒▒r▒CLK_bist_sc_gp▒!sstar,composite-clockH
O p
v▒▒▒rWCLK_jpe▒!sstar,composite-clockH6
-O q▒ q▒v▒▒▒▒▒rpCLK_aesdma▒!sstar,composite-clockH%8O q▒ q▒v▒▒▒▒▒▒rNCLK_sd▒!sstar,composite-clockDH0192:;<*
O q
v▒▒▒▒r▒CLK_fsp_qspi▒!sstar,composite-clocH=O *▒v▒▒▒▒r▒CLK_bist_isp_gp▒!sstar,composite-clockH
O v▒▒▒rSCLK_isp▒!sstar,composite-clockH
6- O q▒ q▒v
▒▒▒▒▒▒rCLK_dsc_enc1▒!sstar,composite-clockH->&O q▒v
▒▒▒▒▒rbCLK_dsc_dec1▒!sstar,composite-clockH->&O q0▒v
▒▒▒▒▒raCLK_fclk1▒!sstar,composite-clockH
-& 6O q▒ q▒v▒▒▒▒▒▒ZrCLK_odclk▒!sstar,composite-clock
1O q▒v▒▒▒CLK_disp_pixel_0▒!sstar,composite-clockH+,?O q$ q▒v▒▒▒▒Zr`CLK_ive▒!sstar,composite-clockH
O q▒ q▒v
▒▒▒▒▒▒roCLK_ldcfeye▒!sstar,composite-clock%
O qL q▒v▒▒▒▒▒▒▒rqCLK_emac_ahb▒!sstar,composite-clockH&
O v▒▒▒rcCLK_au_sys_384▒!sstar,composite-clock
H O▒v▒▒▒rOCLK_au_sys_432▒!sstar,composite-clock
H O▒v▒▒▒rPCLK_bist_miu0▒!sstar,composite-clockH
O ~,v▒▒▒rUCLK_pad_test▒!sstar,composite-clock
H&
!O p▒v▒▒Zr=CLK_pm_high_ext▒!sstar,composite-clockH6-O p@v▒▒Zr▒CLK_pm_pwm▒!sstar,composite-clockpvK_spi_nonpm▒!sstar,composite-clockH
▒▒
Zr▒CLK_pm_uart0▒!sstar,composite-clockHO▒v▒▒Zr▒CLK_pm_fuart0▒!sstar,composite-clockHv
▒Zr▒CLK_pm_fuart1▒!sstar,composite-clockHv▒▒
Zr▒CLK_pm_pspi0▒!sstar,composite-clockHDC O▒v
▒▒
Zr▒CLK_pm_miic0▒!sstar,composite-clockHO▒v▒▒▒r▒CLK_pm_pwr_ctlxterm-256color▒!sstar,composite-clockHO
v▒▒Zr▒CLK_mcu_pm▒!sstar,composite-clockHCFO▒v▒▒▒▒VrCLK_pm_sleep▒!sstar,composite-clock▒v
▒▒CLK_upll_48m▒!sstar,complex-clockHr▒CLK_wdma▒!sstar,composite-clockHO▒▒▒▒r▒CLK_miu_boot▒!sstar,composite-clocH O p▒v▒▒▒r▒usclk!usclk▒HHCALMN5OPQRSTUVBWXYZ[\]^_`?abc@defg(h)'ijklmnopqrs"tuvwxyzK{|}!sstar,composite-clock▒v▒▒ZrmCLK_wdt▒!sstar,composite-clockHO▒v▒▒Zr▒CLK_pm_sdio▒!sstar,composite-clockHEGO▒v
▒Zr▒CLK_pir_pm▒!sstar,composite-clockHO▒v▒▒Zr▒CLK_pm_sr_mclk▒!sstar,composite-clockHIOv
▒Zr▒CLK_ssi_dphy▒!sstar,composite-clockHDEOv▒▒Zr▒CLK_vif_pm▒!sstar,composite-clockHFICOv▒▒Zr▒CLK_pm_timer4▒!sstar,complex-clockH
/%
&+27
413▒8▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒DEFGI=*▒▒▒▒▒▒ :;>-06▒▒▒▒▒▒▒ #$<▒▒▒▒▒▒▒▒▒▒r▒cpufxterm-256colorreq!sstar,infinity-cpufreqH▒▒okmiu
!sstar,miu
K$▒oklight_misc_control!sstar,light_misc_control▒▒
54▒okmmu
!sstar,mmu
K.▒okuart0@1F221000
!sstar,uartO""$KBCC'5Hg▒okr▒uart1@1F221200
!sstar,uartO""$KE\\'5Hh▒okr▒fuart@1F220400
!sstar,uartO""$KOPPJ'5Hf▒okr▒pm_fuart@1F006C00
!sstar,uartOln▒▒
K=@@J'5H▒▒okayr▒pm_fuart1@1F00A400
!sstar,uartO▒▒▒▒
KGHHJ'5H▒▒okayr▒dla
!sstar,dla
KU
Hljk▒okbdma0
!sstar,bdma0
KO ▒H▒▒okbdma1
!sstar,bdma1
KO ▒▒H▒▒okbdma2
!sstar,bdma2
KO ▒H▒▒okbdma8
!sstar,bdma8
KO▒▒H▒▒okfsp-qspi0!sstar,fsp-qspiO
▒kernel_linuxO▒pm_isp▒ispO▒pm_uc▒uc▒pm_uc_bac▒uc_backO_r▒pm_kernel_linuxrestoreO pm_uboot▒ubootO@▒pm_factory_info
▒(pm_rootfs_squashfs▒rootfs_squashfsO2▒▒i2c@1f222800
!sstar,i2O"(
@▒▒▒▒▒▒okr▒emac0
!sstar-emac$K3▒LHcO*0B*0
<8▒▒▒▒▒okr▒mdio-bus@emac0ethernet-phy@0▒miir▒sstar_sdmmc0
O;(C▒xterm-256coloL▒Yblw▒▒▒▒▒▒▒▒▒▒▒
(K2#7mie0_irqmie1_irq
H▒▒$Gclk_sdmmc0clk_sdmmc1pm_mcu_sdmmc1▒okr▒sstar_sdmmc1
!sstar,sdmmc▒▒▒ldO(;(C(L(*Ybl▒x▒w▒▒▒,▒▒▒▒▒▒▒▒▒
(K2▒7mie0_irqcdz_slot0_irq
H▒▒$Gclk_sdmmc0clk_sdmmc1pm_mcu_sdmmc1▒okr▒hst0to1!sstar,hst0to1
K▒▒okriu
!sstar,riu▒▒oktimeoutO ,▒$K▒▒▒▒▒oktimer0@0x1F006040
!sstar,timerHO`@@
K▒▒okr▒timer1@0x1F006080
!sstar,timerHO`▒@
K▒▒okr▒timer2@0x1F0060C0
!sstar,timerHO`▒@
K▒▒okr▒timer3@0x1F006100
!sstar,timerHOa@
K▒▒okr▒timer4@0x1F006140
!sstar,timerH▒Oa@@
K▒▒okr▒timer5@0x1F006180
!sstar,timerH▒Oa▒@
K▒▒okr▒timer6@0x1F0061C0
!sstar,timerH▒Oa▒@
K▒▒okr▒timer7@0x1F006440
!sstar,timerH▒Od@@
K▒▒okr▒timer8@0x1F2CDE40
!sstar,timerO,▒@@
K▒▒okr▒timer9@0x1F2CDE80
!sstar,timerO,ހ@
K▒▒okr▒timer10@0x1F2CDEC0
!sstar,timerO,▒▒@
K▒▒okr▒timer11@0x1F2CDF00
!sstar,timerO,▒@
K▒▒okr▒watchdog0
!sstar,wdtHO`@
!sstar,aesdma
K7HN▒okrng
!sstar,rngH▒▒okgpio
!sstar,rtcpwOh !sstar,gpio▒▒okr▒clkinit!sstar,clkinit▒okrtcpwc
K(▒▒▒okr▒io1Y▒▒pwm@0x1F203200
!sstar,pwO 27▒▒▒H▒▒
Kxterm-256color[▒okr▒pwm@0x1F203280
!sstar,pwO 2▒7▒▒▒H▒▒
K[▒okr▒pwm@0x1F203300
!sstar,pwO 37▒▒▒H▒▒
K[▒okr▒utmi@0x1f284200!syscoO(B
r▒bc@0x1f284400!syscoO(D
r▒usbc@0x1f284600!syscoO(F
r▒uhc@0x1f284800!syscoO(H
!sstar-ehci-1r, Oehc_basO(H▒.▒:▒Hayr▒sstar-ehci-1
K?Y▒^usbh▒okmsb250x-udc-p0!sstar,msb250x-udc O(B(F(J <Outmiusb0otgchiptop
K@7msb250x_udc_p0
?▒star,padmux▒▒`A▒B▒,,,,,,.0▒ep0ep1ep2ep3ep4ep5ep6▒@@@▒@ @@▒H▒okaypadmux
2
q▒▒▒okcamdriverimple-bussstar-camdriver▒▒venc
!sstar,venc(O4,T < x,T-Ovpu-bitvenc-brigehw-uart0hw-uart1venc-gp
K:7mhe-irqH▒u▒▒▒ GCKG_venc▒okisp!isp▒▒
!sstar,ispmid▒okr▒soundr,ispalgo▒okr▒ispmid
!sstar,audio
KJ▒
H▒OP&4BQ^fr▒▒▒▒▒▒▒$8▒▒P
▒▒▒▒▒▒okdla
!sstar,dla
KU
Hljk▒okbdma3
!sstar,bdma3
KO ▒▒H▒▒okbdma4
!sstar,bdma4
KO ▒H▒▒okbdma5
!sstar,bdma5
KO ▒▒H▒▒okbdma6
!sstar,bdma6
KO ▒xterm-256colorxterm-256colorH▒▒okbdma7
!sstar,bdma7
KO ▒▒H▒▒okbdma9
!sstar,bdma9
!sstar,bdma10a10
!sstar,bdma1111
KO▒▒▒H▒▒okcmdq0
!sstar,cmdq0H
K1▒okcmdq1
!sstar,cmdq1H
K1▒okcmdq2
!sstar,cmdq2H
K1▒okcmdq3
!sstar,cmdq3H
K1▒okcmdq4
!sstar,cmdq4H
KM▒okcmdq5
!sstar,cmdq5H
KM▒okcmdq6
!sstar,cmdq6H
KM▒okcmdq7
!sstar,cmdq7H
KM▒okpnl
!sstar,pnl▒okr▒disp
!sstar,disp▒oH`
!sstar,hdmitx▒okr▒csi
!sstar,csi▒▒<=>8:;▒8
/AHYZ[\]^▒ok
W
lr▒vif
!sstar,vif▒okPO&&& | x"t p ~@ <HKY8r▒sensorif!sstar,sensoriH▒▒? $ 6 L b y ▒ ▒ ▒r▒jpe@0x1F246400!sstar,cedric-jpeO$d$f
K=HGCKG_jpe 7jpe-irq0▒▒okr▒ldc0
!sstar,ldcO6P6R
K^Hq▒okr▒scl
!sstar,scl▒okr▒pwm@0x1F203380
!sstar,pwO 3▒7▒▒▒H▒▒
K[▒okr▒pwm@0x1F203400
!sstar,pwO 47▒▒▒H▒▒
K[▒okr▒pwm@0x1F203440
!sstar,pwO 4@7▒▒▒H▒▒
K[▒okr▒pwm@0x1F203480
!sstar,pwO 4▒7▒▒▒H▒▒
K[▒okr▒pwm@0x1F2034C0
!sstar,pwO 4▒7▒▒▒H▒▒
K[▒okr▒pwm@0x1F003400
!sstar,pwO47▒H▒▒▒okr▒pwm@0x1F003440
!sstar,pwO4@7▒▒ H▒▒▒okr▒pwm@0x1F003480
!sstar,pwO4▒7▒▒
H▒▒▒okr▒pwm@0x1F0034C0
!sstar,pwO4▒7▒▒
H▒▒▒okr▒vpe!sigmastar,vpe▒oH▒$K4Z]r▒rgn
!sstar,rgn▒ok
KNr▒ive@0x1F2A3C00!sstar,infinity-iveO*<*>*@
KWHo▒okr▒i2c1
!sstar,i2O"*
KDHw▒▒▒▒▒▒▒▒▒oki2c3
!sstar,i2O|
K+H▒▒▒▒▒▒▒▒▒▒okpm_node ▒ ▒ ▒ ▒▒chosen▒ ▒console=ttyS0,115200n8r androidboot.console=ttyS0 user_debug=31 root=/dev/mtdblock0 init=/linuxrc LX_MEM=0x1fee0000 mma_heap=mma_heap_name0,miu=0,sz=0xA000000,max_start_off=0x29800000 mma_memblock_remove=1 cma=2M nohz=offreserved-memory▒cma0!shared-dma-pool ▒▒
__symbols__
/opp_table0
+/oscillator
0/soc/gic@16000000
4/soc/sstar_main_intc
D/soc/sstar_pm_main_intc
W/soc/sstar_pm_gpi_intc
i/soc/sstar_gpi_intc
x/soc/clocks
}/soc/clocks/CLK_VOID
▒/soc/clocks/CLK_upll_960m
▒/soc/clocks/CLK_upll_480m
▒/soc/clocks/CLK_mpll_432m
▒/soc/clocks/CLK_upll_384m
▒/soc/clocks/CLK_mpll_345m
▒/soc/clocks/CLK_upll_320m
▒/soc/clocks/CLK_mpll_288m
▒/soc/clocks/CLK_mpll_216m
▒/soc/clocks/CLK_mpll_172m
/soc/clocks/CLK_mpll_123m
/soc/clocks/CLK_mpll_86m
/soc/clocks/CLK_upll_480m_div2
2/soc/clocks/CLK_upll_384m_div2
E/soc/clocks/CLK_upll_320m_div2
X/soc/clocks/CLK_mpll_288m_div2
k/soc/clocks/CLK_mpll_288m_div4
~/soc/clocks/CLK_mpll_288m_div8
▒/soc/clocks/CLK_mpll_432m_div4
▒/soc/clocks/CLK_mpll_432m_div8
▒/soc/clocks/CLK_mpll_432m_div16
▒/soc/clocks/CLK_mpll_123m_div2
▒/soc/clocks/CLK_mpll_86m_div2
▒/soc/clocks/CLK_mpll_86m_div4
/soc/clocks/CLK_mpll_86m_div16
/soc/clocks/CLK_upll_384m_div8
(/soc/clocks/CLK_upll_320m_div8
;/soc/clocks/CLK_upll_320m_div10
O/soc/clocks/CLK_upll_320m_div16
c/soc/clocks/CLK_disppll_clk!
s/soc/clocks/CLK_disppll_clk_div2
▒/soc/clocks/CLK_xtali_12m
▒/soc/clocks/CLK_xtali_12m_div2
▒/soc/clocks/CLK_xtali_12m_div4
▒/soc/clocks/CLK_xtali_12m_div8
▒/soc/clocks/CLK_xtali_12m_div16
▒/soc/clocks/CLK_xtali_12m_div40
▒/soc/clocks/CLK_xtali_12m_div64!
▒/soc/clocks/CLK_riu_w_clk_hemcu_gp%56color_gp!
/soc/clocks/CLK_riu_w_clk_mipi_if_gp$#/soc/clocks/CLK_riu_w_clk_mcu_if_gp;/soc/clocks/CLK_spi_synth_pll M/soc/clocks/CLK_fuart_synth_out!a/soc/clocks/CLK_fuart0_synth_out!v/soc/clocks/CLK_fuart1_synth_out▒/soc/clocks/CLK_miu_p▒/soc/clocks/CLK_mspi0_p▒/soc/clocks/CLK_miu_vhe_gp_p▒/soc/clocks/CLK_miu_sc_gp_p▒/soc/clocks/CLK_miu_isp_gp_p▒/soc/clocks/CLK_miu2x_p▒/soc/clocks/CLK_mcu_p▒/soc/clocks/CLK_mcu_pm_p▒/soc/clocks/CLK_isp_p/soc/clocks/CLK_fclk1_p
/soc/clocks/CLK_fclk2_p/soc/clocks/CLK_otp_p"/soc/clocks/CLK_bist_pm_p0/soc/clocks/CLK_sr_mclk&</soc/clocks/CLK_emac_testrx125_in_lan V/soc/clocks/CLK_source_mux_250m%j/soc/clocks/CLK_source_mux_250m_div2%▒/soc/clocks/CLK_source_mux_250m_div4%▒/soc/clocks/CLK_source_mux_250m_div5%▒/soc/clocks/CLK_source_mux_250m_div6%▒/soc/clocks/CLK_source_mux_250m_div8▒/soc/clocks/CLK_12m_mux▒/soc/clocks/CLK_12m_mux_div2/soc/clocks/CLK_12m_mux_div40/soc/clocks/CLK_24m_muxoc/clocks/CLK_rtcpll_clk1/soc/clocks/CLK_ddr_syn=/soc/clocks/CLK_miu_recI/soc/clocks/CLK_mcuQ/soc/clocks/CLK_riubrdg]/soc/clocks/CLK_pwme/soc/clocks/CLK_fuart_synth_in x/soc/clocks/CLK_fuart0_synth_in ▒/soc/clocks/CLK_fuart1_synth_in▒/soc/clocks/CLK_fuart▒/soc/clocks/CLK_fuart0▒/soc/clocks/CLK_fuart1▒/soc/clocks/CLK_mspi0▒/soc/clocks/CLK_miic0▒/soc/clocks/CLK_miic1▒/soc/clocks/CLK_miic2▒/soc/clocks/CLK_bist▒/soc/clocks/CLK_bist_pm▒/soc/clocks/CLK_bist_mcu
/soc/clocks/CLK_pwr_ctl/soc/clocks/CLK_xtali /soc/clocks/CLK_live_c+/soc/clocks/CLK_live4/soc/clocks/CLK_sr00_mclkB/soc/clocks/CLK_sr01_mclkP/soc/clocks/CLK_sr02_mclk^/soc/clocks/CLK_sr03_mclkl/soc/clocks/CLK_bist_ipu_gp|/soc/clocks/CLK_ipu▒/soc/clocks/CLK_ipuff▒/soc/clocks/CLK_hemcu$▒/soc/clocks/CLK_csi0_mac_lptx_top_i▒/soc/clocks/CLK_csi0_mac_top_i▒/soc/clocks/CLK_csi0_ns_top_i$▒/soc/clocks/CLK_csi1_mac_lptx_top_i▒/soc/clocks/CLK_csi1_mac_top_i/soc/clocks/CLK_csi1_ns_top_i/soc/clocks/CLK_bist_vhe_gp"/soc/clocks/CLK_vhe*/soc/clocks/CLK_mfe2/soc/clocks/CLK_ven_axi>/soc/clocks/CLK_ven_scdnK/soc/clocks/CLK_ven_sc_ifY/soc/clocks/CLK_xtali_sc_gp/soc/clocks/CLK_bist_sc_gpx/soc/clocks/CLK_jpe▒/soc/clocks/CLK_aesdma▒/soc/clocks/CLK_sd▒/soc/clocks/CLK_fsp_qspi▒/soc/clocks/CLK_bist_isp_gp▒/soc/clocks/CLK_isp▒/soc/clocks/CLK_dsc_enc1▒/soc/clocks/CLK_dsc_dec1▒/soc/clocks/CLK_fclk1▒/soc/clocks/CLK_odclk▒/soc/clocks/CLK_disp_pixel_0▒/soc/clocks/CLK_ive▒/soc/clocks/CLK_ldcfeye
/soc/clocks/CLK_emac_ahboc/clocks/CLK_au_sys_384oc/clocks/CLK_au_sys_4325/soc/clocks/CLK_bist_miu0C/soc/clocks/CLK_pad_testP/soc/clocks/CLK_otpX/soc/clocks/CLK_real_livef/soc/clocks/CLK_spi_nonpmt/soc/clocks/CLK_pm_high_ext▒/soc/clocks/CLK_pm_pwm▒/soc/clocks/CLK_pm_uart0▒/soc/clocks/CLK_pm_fuart0▒/soc/clocks/CLK_pm_fuart1▒/soc/clocks/CLK_pm_pspi0▒/soc/clocks/CLK_pm_miic0/soc/clocks/CLK_pm_pwr_ctl▒/soc/clocks/CLK_mcu_pm▒/soc/clocks/CLK_pm_sleep▒/soc/clocks/CLK_sar/soc/clocks/CLK_rtc /soc/clocks/CLK_ir/soc/clocks/CLK_wdt/soc/clocks/CLK_pm_sdio$/soc/clocks/CLK_pir_pmoc/clocks/CLK_pm_sr_mclk>/soc/clocks/CLK_ssi_dphyK/soc/clocks/CLK_vif_pmV/soc/clocks/CLK_pm_timer4d/soc/clocks/CLK_pm_timer5r/soc/clocks/CLK_pm_timer6▒/soc/clocks/CLK_pm_timer7▒/soc/clocks/CLK_upll_48m▒/soc/clocks/CLK_wdma▒/soc/clocks/CLK_miu_boot▒/soc/clocks/usclk▒/soc/uart0@1F221000▒/soc/uart1@1F221200▒/soc/fuart@1F220400▒/soc/pm_fuart@1F006C00▒/soc/pm_fuart1@1F00A400▒/soc/i2c@1f222800
▒/soc/emac0)▒/soc/emac0/mdio-bus@emac0/ethernet-phy@0▒/soc/sstar_sdmmc0▒/soc/sstar_sdmmc1▒/soc/timer0@0x1F006040▒/soc/timer1@0x1F006080▒/so/soc/timer9@0x1F2CDE80/soc/timer10@0x1F2CDEC0/soc/timer11@0x1F2CDF00oc/timer5@0x1F006180y/soc/timer6@0x1F0061C0▒/soc/timer7@0x1F006440/soc/timer8@0x1F2CDE40 ▒/soc/gpio
$/soc/rtcpwc+/soc/pwm@0x1F2032000/soc/pwm@0x1F2032805/soc/pwm@0x1F203300:/soc/utmi@0x1f284200H/soc/bc@0x1f284400T/soc/usbc@0x1f284600b/soc/uhc@0x1f284800
o/soc/u2phy1▒/camdriver/isp|/camdriver/ispalgo▒/camdriver/ispmidxterm-256color▒/camdriver/pnl▒/camdriver/disp▒/camdriver/hdmitx▒/camdriver/csi▒/camdriver/vif▒/camdriver/sensorif▒/camdriver/jpe@0x1F246400▒/camdriver/ldc0▒/camdriver/scl▒/camdriver/pwm@0x1F203380▒/camdriver/pwm@0x1F203400▒/camdriver/pwm@0x1F203440▒/camdriver/pwm@0x1F203480▒/camdriver/pwm@0x1F2034C0▒/camdriver/pwm@0x1F003400▒/camdriver/pwm@0x1F003440▒/camdriver/pwm@0x1F003480▒/camdriver/pwm@0x1F0034C0▒/camdriver/vpe▒/camdriver/rgn▒/camdriver/ive@0x1F2A3C00 #address-cells#size-cellsmodelcompatibledevice_typeclock-frequencyclocksregoperating-points-v2opp-sharedphandleopp-hzopp-microvoltstatus#clock-cellsconsoleserial0serial1serial2serial3serial4sdmmc0sdmmc1interrupt-parentranges#interrupt-cellsinterrupt-controllerredistributor-stride#redistributor-regionsinterruptsstr-ignoreclock-divclock-multmux-shiftmux-widthgate-shiftauto-enableglitch-shiftdfs-shiftdfs-widthod-shiftnonod-shiftgate-enableclock-countlightsensor-i2cir-ctrlmodeir-padircut-paddma-enablerx_fifo_leveltx_fifo_leveldigmuxsctp_enablecs-numcs-modeenginedmacs-selectfcie-interfacelabelgroupspeedt-su-stat-hd-stat-su-stot-hd-stooutput-modebus-modephy-handlecpu-affinityphy-modebus-widthmax-frequencynon-removablecap-mmc-highspeedno-sdiono-sdpll-regcifd-regpwr-save-regip-orderpad-ordertrans-modefake-cdzrev-cdzpwr-on-delaypwr-off-delaycifd-mcg-offsupport-cmd23clk-drivingcmd-drivingdata-drivingen-clk-phaserx-clk-phasetx-clk-phaseen-eight-phaserx-eight-phasetx-eight-phaseinterrupt-namesclock-namescap-sd-highspeedcap-sdio-irqno-mmcsupport-runtime-pmcdz-padpwr-padsdio-use-1bitprint-onclock-on-demand#gpio-cellsio4-enableio5-enablekeycode#pwm-cellschannelclk-selectreg-io-widthsyscon-utmisxterm-256coloryscon-uhcsyscon-usbcsyscon-bc#phy-cellsreg-namesphysphy-namessupport_high_2g_access_patchmaximum-speedep_nameep_maxpkt_limitep_fifo_sizedma_channel_numschematicio_phy_addrbanksclock-frequency-indexamp-paddigmic-padmuxi2s-trx-shared-padmuxi2s-tx-padmuxi2s-rx-padmuxi2s-mck-padmuxkeep-i2s-clki2s-pcmi2s-rx-modei2s-rx0-tdm-ws-pgmi2s-rx0-tdm-ws-widthi2s-rx0-tdm-ws-invi2s-rx0-tdm-bck-invi2s-rx0-tdm-ch-swapi2s-tx0-tdm-ws-pgmi2s-tx0-tdm-ws-widthi2s-tx0-tdm-ws-invi2s-tx0-tdm-bck-invi2s-tx0-tdm-ch-swapi2s-tx0-tdm-active-slotdmic-bck-modedmic-bck-ext-modehpf-adc1-levelhpf-dmic-levelkeep_adc_power_onkeep_dac_power_oni2s-rx-short-ff-modei2s-tx-short-ff-modeadc-out-seladc-ch-inmuxatop_banksclkgen_bankscsi_sr0_lane_numcsi_sr2_lane_numcsi_sr0_lane_selectcsi_sr2_lane_selectcsi_sr0_lane_pn_swapcsi_sr2_lane_pn_swapsnr0_mipi_i2csnr2_mipi_i2csnr_sr0_mipi_modesnr_sr0_mipi_rst_modesnr_sr0_mipi_pdn_modesnr_sr0_mipi_mclk_modesnr_sr0_pdn_gpiosnr_sr0_rst_gpiosnr_sr0_rst_polsnr_sr2_mipi_modesnr_sr2_mipi_rst_modesnr_sr2_mipi_pdn_modesnr_sr2_mipi_mclk_modesnr_sr2_rst_gpiosnr_sr2_rst_polvif_sr0_mclk_37p125vif_sr2_mclk_37p125flash_sizept_tablept_table_restoreCMDMEMbootargsreusablealignmentlinux,cma-defaultcpu0_opp_tablextalgicsstar_main_intcsstar_pm_main_intcsstar_pm_gpi_intcsstar_gpi_intcclksCLK_VOIDCLK_upll_960mCLK_upll_480mCLK_mpll_432mCLK_upll_384mCLK_mpll_345mCLK_upll_320mCLK_mpll_288mCLK_mpll_216mCLK_mpll_172mCLK_mpll_123mCLK_mpll_86mCLK_upll_480m_div2CLK_upll_384m_div2CLK_upll_320m_div2CLK_mpll_288m_div2CLK_mpll_288m_div4CLK_mpll_288m_div8CLK_mpll_432m_div4CLK_mpll_432m_div8CLK_mpll_432m_div16CLK_mpll_123m_div2CLK_mpll_86m_div2CLK_mpll_86m_div4CLK_mpll_86m_div16CLK_upll_384m_div8CLK_upll_320m_div8CLK_upll_320m_div10CLK_upll_320m_div16CLK_disppll_clkCLK_disppll_clk_div2CLK_xtali_12mCLK_xtali_12m_div2CLK_xtali_12m_div4CLK_xtali_12m_div8CLK_xtali_12m_div16CLK_xtali_12m_div40CLK_xtali_12m_div64CLK_xtali_12m_div128CLK_xterm-256colorxtali_24mCLK_CLK_12M_CORE_v_liveCLK_RTC_CLK_32KCLK_pm_riu_w_clk_inCLK_ipupll_clkCLK_miupll_clkCLK_cpu_pllCLK_armpll_37p125mCLK_riu_w_clk_inCLK_riu_w_clk_topCLK_riu_w_clk_sc_gpCLK_riu_w_clk_vhe_gpCLK_riu_w_clk_hemcu_gpCLK_riu_w_clk_mipi_if_gpCLK_riu_w_clk_mcu_if_gpCLK_spi_synth_pllCLK_fuart_synth_outCLK_fuart0_synth_outCLK_fuart1_synth_outCLK_miu_pCLK_mspi0_pCLK_miu_vhe_gp_pCLK_miu_sc_gp_pCLK_miu_isp_gp_pCLK_miu2x_pCLK_mcu_pCLK_mcu_pm_pCLK_isp_pCLK_fclk1_pCLK_fclk2_pCLK_otp_pCLK_bist_pm_pCLK_sr_mclkCLK_emac_testrx125_in_lanCLK_source_mux_250mCLK_source_mux_250m_div2CLK_source_mux_250m_div4CLK_source_mux_250m_div5CLK_source_mux_250m_div6CLK_source_mux_250m_div8CLK_12m_muxCLK_12m_mux_div2CLK_12m_mux_div40CLK_24m_muxCLK_rtcpll_clkCLK_ddr_synCLK_miu_recCLK_mcuCLK_riubrdgCLK_pwmCLK_fuart_synth_inCLK_fuart0_synth_inCLK_fuart1_synth_inCLK_fuartCLK_fuart0CLK_fuart1CLK_mspi0CLK_miic0CLK_miic1CLK_miic2CLK_bistCLK_bist_pmCLK_bist_mcuCLK_pwr_ctlCLK_xtaliCLK_live_cCLK_liveCLK_sr00_mclkCLK_sr01_mclkCLK_sr02_mclkCLK_sr03_mclkCLK_bist_ipu_gpCLK_ipuCLK_ipuffCLK_hemcuCLK_csi0_mac_lptx_top_iCLK_csi0_mac_top_iCLK_csi0_ns_top_iCLK_csi1_mac_lptx_top_iCLK_csi1_mac_top_iCLK_csi1_ns_top_iCLK_bist_vhe_gpCLK_vheCLK_mfeCLK_ven_axiCLK_ven_scdnCLK_ven_sc_ifCLK_xtali_sc_gpCLK_bist_sc_gpCLK_jpeCLK_aesdmaCLK_sdCLK_fsp_qspiCLK_bist_isp_gpCLK_ispCLK_dsc_enc1CLK_dsc_dec1CLK_fclk1CLK_odclkCLK_disp_pixel_0CLK_iveCLK_ldcfeyeCLK_emac_ahbCLK_au_sys_384CLK_au_sys_432CLK_bist_miu0CLK_pad_testCLK_otpCLK_real_liveCLK_spi_nonpmCLK_pm_high_extCLK_pm_pwmCLK_pm_uart0CLK_pm_fuart0CLK_pm_fuart1CLK_pm_pspi0CLK_pm_miic0CLK_pm_pwr_ctlCLK_mcu_pmCLK_pm_sleepCLK_sarCLK_rtcCLK_irCLK_wdtCLK_pm_sdioCLK_pir_pmCLK_pm_sr_mclkCLK_ssi_dphyCLK_vif_pmCLK_pm_timer4CLK_pm_timer5CLK_pm_timer6CLK_pm_timer7CLK_upll_48mCLK_wdmaCLK_miu_bootusclkpm_fuarti2c0emac0phy0sstar_sdmmc0sstar_sdmmc1timer0timer1timer2timer3timer8timer9timer10timer11rtcpwcpwm0pwm1pwm2usb2phy1_utmiusb2phy1_bcusb2phy1_usbcusb2phy1_uhcsstar_u2phy1ispalgoispmidpnldisphdmitxcsivifsensorifjpe0ldc0sclpwm3pwm4pwm5pwm6pwm7pwm8pwm9pwm10pwm11vpergnive0root@(sx25v2):~# xterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-2
56colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxte
rm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-256colorxterm-
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