7.3.8 MMU Instructions and Register Summary
The MMU instructions and registers allow the operating system to set up the SRs. Additionally, the operating system has the resources to set up the block address translation areas and the page tables in memory.
MMU指令和寄存器允许操作系统设置这些SR寄存器。另外,操作系统有资源设置内存中块地址转换区域与页表。
Note that because the implementation of TLBs is optional, instructions that refer to TLBs are also optional. However, because TLBs serve as caches of the page table, there must be a software protocol for maintaining coherency between these caches and the tables in memory whenever the tables in memory are modified. Therefore, the OEA specifies that a processor implementing a TLB is guaranteed to have a means for doing the following:
• Invalidating an individual TLB entry
• Invalidating the entire TLB
注意,由于TLB的实现是可选的,因此关于TLB的指令也是可选的。但是,由于TLB用作页表的缓存,因此必须有软件协议来保持缓存与内存中的页表的相关性。因此,OEA规定,实现TLB的处理器保证具有执行以下操作的方法:
•使单个TLB条目无效
•使整个TLB失效
Figure 7-5 shows the registers that the operating system uses to program the MMU. These regi