function bit [15:0] compute_crc16(const ref logic [7:0] bytes[],
input int unsigned offset = 0,
input integer len = -1);
logic [15:0] crc;
integer i;
if (len < 0) len = bytes.size() - offset;
crc = 16'hFFFF;
for (i = offset; i < offset+len && i < bytes.size(); i++) begin
// If any bit of the packed data is 'x', it
// will cause a run-time failure because of an
// invalid index in crc_table[]
if ((^bytes[i]) === 1'bx) begin
return 16'hXXXX;
end
crc = crc_table[crc[7:0] ^ bytes[i]] ^
{8'h00, crc[15:8]};
end
// Invert final result
crc = ~crc;
// Swap bytes to obtain transmit order
compute_crc16[15:8] = crc[ 7: 0];
compute_crc16[7:0] = crc[15: 8];
endfunction: compute_crc16
endclass
input int unsigned offset = 0,
input integer len = -1);
logic [15:0] crc;
integer i;
if (len < 0) len = bytes.size() - offset;
crc = 16'hFFFF;
for (i = offset; i < offset+len && i < bytes.size(); i++) begin
// If any bit of the packed data is 'x', it
// will cause a run-time failure because of an
// invalid index in crc_table[]
if ((^bytes[i]) === 1'bx) begin
return 16'hXXXX;
end
crc = crc_table[crc[7:0] ^ bytes[i]] ^
{8'h00, crc[15:8]};
end
// Invert final result
crc = ~crc;
// Swap bytes to obtain transmit order
compute_crc16[15:8] = crc[ 7: 0];
compute_crc16[7:0] = crc[15: 8];
endfunction: compute_crc16
endclass

该博客介绍了一个使用SystemVerilog编写的计算16位CRC校验的函数。函数`compute_crc16`接受一个字节数组、起始偏移量和长度作为输入,返回计算后的CRC值。在计算过程中,它使用预定义的CRC表格并处理可能的未知数据位。最后,函数反转结果并调整字节顺序以适应传输。
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