1 Preliminary
- Computer Architecture A Quantitative Approach, 5th Edition()
2 Memory Model
2.1 Three Aspects
Atomicity
Visibility
Ordering
2.2 General Model(Weaker)
- The hardware threads can each perform reads and writes out-of-order, oreven speculatively (before preceding conditional branches have been resolved). In contrast to TSO, where there is no local reordering except of reads after writes to different addresses, here any local reordering is allowed unless specified otherwise.
- The memory system (perhaps involving a hierarchy of buffers and a complex interconnect) does not guarantee that a write becomes visible to all other hardware threads at the same time point; these architectures are not multiple-copy atomic.

本文深入探讨了内存模型的三个方面:原子性、可见性和顺序,并对比了CPU内存模型和语言内存模型之间的差异。从硬件层面的内存屏障到Java和C++的标准,内容涵盖并发编程中的锁-free实现、相关书籍推荐以及有价值的博客资源。
最低0.47元/天 解锁文章
1027

被折叠的 条评论
为什么被折叠?



