Nand Flash 命名规则

1、三星

NAND Flash CodeInformation

 

1. Memory(K)
2. NAND Flash :9
3. SmallClassification
(SLC : Single Level Cell, MLC : Multi Level Cell,
SM : SmartMedia, S/B : Small Block)
1 : SLC 1 Chip XD Card
2 : SLC 2 Chip XD Card
3 : 4bit MLC Mono
4 : SLC 4 Chip XD Card
5 : MLC 1 Chip XD Card
6 : MLC 2 Chip XD Card
7 : SLC moviNAND
8 : MLC moviNAND
9 : 4bit MLC ODP
A : 3bit MLC MONO
B : 3bit MLC DDP
C : 3bit MLC QDP
F : SLC Normal
G : MLC Normal
H : MLC QDP
K : SLC Die Stack
L : MLC DDP
M : MLC DSP
N : SLC DSP
O : 3bit MLC ODP
P : MLC ODP
Q : SLC ODP
R : MLC 12-die stack
S : MLC 6 Die Stack
T : SLC SINGLE (S/B)
U : MLC 16 Die Stack
W : SLC 4 Die Stack
4~5. Density（注：实际单位应该是bit，而不是Byte）
12 : 512M 16 : 16M 28 : 128M
32 : 32M 40 : 4M 56 : 256M
64 : 64M 80 : 8M 1G : 1G
2G : 2G 4G : 4G 8G : 8G
AG : 16G BG : 32G CG : 64G
DG : 128G EG : 256G FG : 256G
GG : 384G HG : 512G LG : 24G
NG : 96G ZG : 48G 00 : NONE
6. Technology
0 : Normal (x8) 1 :Normal (x16)
C : Catridge SIP D : DDR
M : moviNAND N : moviNAND FAB
P : moviMCP T : Premium eSSD
Z : SSD
7. Organization
0 : NONE 8 : x8
6 : x16
8. Vcc
A : 1.65V~3.6V B : 2.7V (2.5V~2.9V)
C : 5.0V (4.5V~5.5V) D : 2.65V (2.4V ~ 2.9V)
E : 2.3V~3.6V R : 1.8V (1.65V~1.95V)
Q : 1.8V (1.7V ~ 1.95V) T : 2.4V~3.0V
S : 3.3V (3V~3.6V/ VccQ1.8V (1.65V~1.95V)
U : 2.7V~3.6V V : 3.3V (3.0V~3.6V)
W : 2.7V~5.5V, 3.0V~5.5V 0 : NONE
9. Mode
0 : Normal
1 : Dual nCE & Dual R/nB
3 : Tri /CE & Tri R/B
4 : Quad nCE & Single R/nB
5 : Quad nCE & Quad R/nB
6 : 6 nCE & 2 RnB
7 : 8 nCE & 4 RnB
8 : 8 nCE & 2 RnB
9 : 1st block OTP
A : Mask Option 1
L : Low grade
10. Generation
M : 1stGeneration
A : 2nd Generation
B : 3rd Generation
C : 4th Generation
D : 5th Generation
E : 6th Generation
Y : 25th Generation
Z : 26th Generation
11. "─"
12. Package
8 : TSOP1 (Lead-Free,Halogen-Free, CU)
9 : 56TSOP1 (Lead-Free, Halogen-Free, CU)
A : COB
B : FBGA (Halogen-Free, Lead-Free)
D : 63-TBGA
E : ISM (Lead-Free, Halogen-Free)
F : WSOP (Lead-Free) G : FBGA
H : BGA (Lead-Free, Halogen-Free)
I : ULGA (Lead-Free) (12*17)
J : FBGA (Lead-Free)
K : ULGA (Lead-Free, Halogen-Free) (12*17)
L : ULGA (Lead-Free, Halogen-Free) (14*18)
M : 52-ULGA (Lead-Free, Halogen-Free) (13*18)
P : TSOP1 (Lead-Free)
Q : TSOP2 (Lead-Free)
R : 56-TSOP1 (Lead-Free, Halogen-Free)
S : TSOP1 (Lead-Free, Halogen-Free)
T : WSOP (Lead-Free, Halogen-Free)
U : COB (MMC)
V : WSOP W : Wafer
Y : TSOP1 Z : WELP (Lead-Free)
13. Temp
C : Commercial I :Industrial
S : SmartMedia
B : SmartMedia BLUE
0 : NONE (Containing Wafer, CHIP, BIZ, Exception
handling code)
NAND Flash Code Information(2/3)
K 9 X X X X X X X X - X X X X X X X
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
14. Customer Bad Block
B : Include BadBlock
D : Daisychain Sample
K : Special Handling
L : 1~5 Bad Block
N : ini. 0 blk, add. 10 blk
S : All Good Block
0 : NONE (Containing Wafer, CHIP, BIZ, Exception
handling code)
15. Pre-Program Version
0 : None
Serial (1~9, A~Z)

16. PackingType

- Common to all products,except of Mask ROM
- Divided into TAPE & REEL(In Mask ROM, dividedinto TRAY, AMMO Packing Separately

 

17~18. Customer"Customer List Reference"

【举例说明】

K	9	G	A	G	0	8	U	0	M	-	P	C	B	0
1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16	17	18

K9GAG08U0M 详细信息如下:
1. Memory (K)

2. NAND Flash : 9

3. Small Classification
(SLC : Single Level Cell, MLC : Multi Level Cell,
SM : SmartMedia, S/B : Small Block)
G : MLC Normal

4~5. Density
AG : 16G (Note: 这里单位是bit而不是byte，因此实际大小是16Gb=2GB)

6. Technology
0 : Normal (x8)

7. Organization
0 : NONE 8 : x8

8. Vcc
U : 2.7V~3.6V

9. Mode
0 : Normal

10. Generation
M : 1st Generation

11. "─"

12. Package
P : TSOP1 (Lead-Free)

13. Temp
C : Commercial

14. Customer Bad Block
B : Include Bad Block

15. Pre-Program Version
0 : None

整体描述就是：

K9GAG08U0M是，三星的MLC Nand Flash，工作电压为2.7V~3.6V，x8（即I/O是8位），大小是2GB（16Gb），TSOP1封装。

2、海力士

H 2 7 X X X X X X X X X - X X
(1) HYNIX
(2) PRODUCT FAMILY
(4) POWER SUPPLY(VCC)
(8) NAND CLASSIFICATION
(7) ORGANIZATION
(14) BAD BLOCK
(11) PACKAGE TYPE
2 : Flash
S: SLC + Single Die + Small Block
A: SLC + Double Die + Small Block
B: SLC + Quadruple Die + Small Block
F: SLC + Single Die + Large Block
G: SLC + Double Die + Large Block
H: SLC + Quadruple Die + Large Block
J: SLC + ODP + Large Block
K: SLC + DSP + Large Block
T: MLC + Single Die + Large Block
U: MLC + Double Die + Large Block
V: MLC + Quadruple Die + Large Block
W: MLC + DSP + Large Block
Y: MLC + ODP + Large Block
C: Included Bad Block
E: 1~5 Bad Block Included
M: All Good Block
I: TSOP1
B: WSOP
S: USOP
P: LSOP1
T: FBGA
V: LGA
S: WLGA
N: VLGA
F: ULGA
X: Wafer
M: PGD1 (chip)
Y: KGD
U: PGD2
W: 1st
C: 2nd
K: 3rd
D: 4th
M
A
B
C
(5), (6) DENSITY
1: 1 nCE & 1 R/nB; Sequential Row Read Enable
2: 1 nCE & 1 R/nB; Sequential Row ReadDisable
4: 2 nCE & 2 R/nB; Sequential Row Read Enable
5: 2 nCE & 2 R/nB; Sequential Row ReadDisable
D: Dual Interface; Sequential Row Read Disable
F: 4 nCE & 4 R/nB ; Sequential Row ReadDisable

3、镁光

MT 29F 2G 08 A A A WP - xx xx xx xx ES : A
Micron Technology Design Revision (shrink)
A = 1st design revision
1. Single-Supply Flash
29F = Single-Supply NAND Flash Production Status
29H = High Speed NAND Blank = Production
ES = Engineering samples
2. Density QS = Qualification samples
1G = 1Gb MS = Mechanical samples
2G = 2Gb
4G = 4Gb Operating Temperature Range
8G = 8Gb Blank = Commercial (0°C to +70°C)
16G = 16Gb ET = Extended (–40°C to +85°C)
32G = 32Gb WT = Wireless (–25°C to +85°C)
64G = 64Gb
128G = 128Gb Block Option (Reserved for use)
256G = 256Gb Blank = Standard device
3. Device Width Flash Performance
08 = 8 bits Blank = Full specification
16 = 16 bits
4. Speed Grade (MT29H Only)
Classification 15 = 133 MT/s
12 = 166 MT/s
5. Mark Bit/cell Die RnB
A SLC 1 1 Package Code
B SLC 2 1 WP = 48-pin TSOP I (CPL version) (Pb-free)
C SLC 2 1 WC = 48-pin TSOP I (OCPL version) (Pb-free)
D SLC 2 2 H1 = 100-ball VFBGA (Pb-free), 12 x 18 x 1.0
E SLC 2 2 H2 = 100-ball TFBGA (Pb-free), 12 x 18 x 1.2
F SLC 4 2 HC = 63-ball VFBGA, 10.5 x 13 x 1.0
G SLC 4 2 C2 = 52-pad ULGA, 12 x 17 x 0.4 (use TBD)
J SLC 4 + 4 2 + 2 C3 = 52-pad ULGA, 12 x 17 x 0.65
K SLC 8 4 C4 = 52-pad VLGA, 12 x 17 x 1.0 (SDP/DDP/QDP)
Z SLC 1 NA C5 = 52-pad VLGA, 14 x 18 x 1.0 (SDP/DDP/QDP)
C6 = 52-pad LLGA, 14 x 18 x 1.47 (8DP, QDP, DDP)
M MLC 1 1 C7 = 48-pad LLGA, 12 x 20 x 1.47 (8DP)
N MLC 2 1 SWC = 48-pin Stacked TSOP (OCPL version) (Pb-free)
P MLC 2 1 SWP = 48-pin Stacked TSOP (CPL version) (Pb-free)
Q MLC 2 2
R MLC 2 2 Generation (M29 only)/Feature Set
T MLC 4 2 A = 1st set of device features
U MLC 4 2 B = 2nd set of device features (rev only if differentthan 1st set)
V MLC 4 + 4 2 + 2 C = 3rd set of device features (rev only ifdifferent)
W MLC 8 4 D = 4th set of device features (rev only ifdifferent)
Y MLC 8 4 etc.
6. Operating Voltage Range
A = 3.3V (2.70–3.60V), VccQ 3.3V (2.70–3.60V)
B = 1.8V (1.70–1.95V)
C = 3.3V (2.70–3.60V), VccQ 1.8V (1.70–1.95V)
*Contact Micron for help differentiating between standard andnext-generation NAND offerings.