1.Orangepi PC2 uboot编译

本文详细介绍了在Ubuntu 18.04 LTS环境下,从官方源码编译OrangePi H5所需的uboot和kernel的过程。包括源码下载、交叉编译工具配置、编译环境搭建、编译步骤及常见问题解决。

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开发环境 ubuntu18.04LTS

官方源码下载地址:https://github.com/orangepi-xunlong/OrangePi_Build

上述链接下载下来是脚本,需要运行脚本下载源码

以下是具体的源码下载地址:

OrangePi PC2/Prima/Zero plus2

OrangePi PC2/Prima/Zero plus build on Allwinner H5 Soc, the offical maintain repository as follow:

kernel:

  git clone https://github.com/orangepi-xunlong/OrangePiH5_kernel.git

u-boot:

  git clone https://github.com/orangepi-xunlong/OrangePiH5_uboot.git

build scripts

 git clone https://github.com/orangepi-xunlong/OrangePiH5_scripts.git

external binary file

  git clone https://github.com/orangepi-xunlong/OrangePiH5_external.git

toolchain

  git clone https://github.com/orangepi-xunlong/OrangePiH5_toolchain.git

 注:以下的命令都是参考官方脚本。如果想方便可以直接使用官方脚本即可。

其实本人不建议购买orangepi,因为这货的电源插槽很松,触动的话,导致死机重启。如果已入坑,请不购买原装电源,换第三方电源。


#解压交叉编译工具
$cd /root/Oriangepi/OrangePiH5
$ls
build.sh  external  kernel  scripts  toolchain  uboot


#将分卷还原成一个压缩包
$cat toolchain/toolchain_tar/toolchain* > toolchain/toolchain.tar.gz

$pwd
/root/Oriangepi/OrangePiH5
#解压kernel用的64位交叉编译工具
tar -zxvf toolchain/toolchain.tar.gz

#删除H3用的交叉编译工具
rm toolchain/gcc-linaro-aarch/gcc-linaro -rf

#解压H5 uboot用的交叉编译工具
cat toolchain/toolchain_tar/u-boot-compile-tools0* > toolchain/u-boot-compile-tools.tar.gz
#解压到H5 kernel交叉编译工具目录
tar -zxvf toolchain/u-boot-compile-tools.tar.gz -C toolchain/gcc-linaro-aarch/

#以下为可选操作
#删除烦人的压缩分卷,节省磁盘空间
rm /root/Oriangepi/OrangePiH5/toolchain -rf

将uboot和kernel的交叉编译工具添加至环境变量

#For H5
export PATH=/root/Oriangepi/OrangePiH5/toolchain/gcc-linaro-aarch/bin:$PATH
export PATH=/root/Oriangepi/OrangePiH5/toolchain/gcc-linaro-aarch/gcc-linaro/bin:$PATH

让环境变量生效需要注销用户、重启或者

source ~/.bashrc

开始编译

#创建输出目录
$mkdir /root/Oriangepi/OrangePiH5/output

#进入UBOOT目录
$cd /root/Oriangepi/OrangePiH5/uboot

 

查看可用配置文件

 

grep -r "sunxi" ./boards.cfg

 

Active  aarch64    armv7          sun50iw1p1    sunxi          sun50iw1p1          sun50iw1p1                            sun50iw1p1:SUN50IW1P1                                                                                                                   wangwei<wangwei@allwinnertech.com>
Active  aarch64    armv7          sun50iw2p1    sunxi          sun50iw2p1          sun50iw2p1                            sun50iw2p1:SUN50IW2P1                                                                                                                   wangwei <wangwei@allwinnertech.com>
Active  aarch64    armv7          sun50iw3p1    sunxi          sun50iw3p1          sun50iw3p1                            sun50iw3p1:SUN50IW3P1                                                                                                                   Jerry Wang <wangflord@allwinnertech.com>
#Active  aarch64     armv8          wine        sunxi           perf                wine                                  wine:ARM64,FPGA                                                                                                                   Jerry Wang <wangflord@allwinnertech.com>
Active  arm       armv7          sun8iw10p1    sunxi          sun8iw10p1          sun8iw10p1                            sun8iw10p1:SUN8IW10P1                                                                                                                    Young<guoyingyang@allwinnertech.com>
Active  arm       armv7          sun8iw11p1    sunxi          sun8iw11p1          sun8iw11p1                            sun8iw11p1:SUN8IW11P1                                                                                                                    wangwei<wangwei@allwinnertech.com>
Active  arm       armv7          sun8iw11p1    sunxi          sun8iw11p1          sun8iw11p1_nor                            sun8iw11p1:SUN8IW11P1_NOR                                                                                                                    wangwei<wangwei@allwinnertech.com>
Active  arm         armv7          sunxi       -               sunxi               Cubietruck                            sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII                                                                                             -
Active  arm         armv7          sunxi       -               sunxi               Cubietruck_FEL                        sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII 

可用看到可用配置名为sun50iw2p1,具体可参考/root/Oriangepi/OrangePiH5/scripts/uboot_compile.sh

$make CROSS_COMPILE=arm-linux-gnueabi- distclean
$make CROSS_COMPILE=arm-linux-gnueabi- sun50iw2p1_config
$make CROSS_COMPILE=arm-linux-gnueabi-

$make CROSS_COMPILE=arm-linux-gnueabi- spl

等待编译完成后,需要做几步工作,最坑的那几步

cd /root/Oriangepi/OrangePiH5/external

cp sys_config/OrangePiH5_PC2_sys_config.fex sys_config.fex

#将原内核的设备树改名,当然你改pack脚本文件也是可以的
mv /root/Oriangepi/OrangePiH5/kernel/arch/arm64/boot/dts /root/Oriangepi/OrangePiH5/kernel/arch/arm64/boot/dts.bak

#将PC2的设备树拷贝到内核
cp /root/Oriangepi/OrangePiH5/external/BUFFER/OrangePiH5_PC2_dts /root/Oriangepi/OrangePiH5/kernel/arch/arm64/boot/dts

#开始打包,转格式
$cd /root/Oriangepi/OrangePiH5/scripts/pack
$./pack

#打包完成后,进入输出目录
$cd /root/Oriangepi/OrangePiH5/output/pack/out

#复制
$cp boot0_sdcard.fex ../boot0.bin
$cp boot_package.fex ../uboot.bin

插入sd卡

#确认插入设备的设备号,防止将系统弄崩溃
$dmesg
[  983.624390] usb 1-1: new high-speed USB device number 2 using ehci-pci
[  983.895585] usb 1-1: New USB device found, idVendor=05e3, idProduct=0751
[  983.895589] usb 1-1: New USB device strings: Mfr=3, Product=4, SerialNumber=0
[  983.895591] usb 1-1: Product: USB Storage
[  983.895593] usb 1-1: Manufacturer: USB Storage
[  983.973901] usb-storage 1-1:1.0: USB Mass Storage device detected
[  983.973996] scsi host3: usb-storage 1-1:1.0
[  983.974547] usbcore: registered new interface driver usb-storage
[  983.996241] usbcore: registered new interface driver uas
[  985.004332] scsi 3:0:0:0: Direct-Access     Generic  STORAGE DEVICE   1404 PQ: 0 ANSI: 6
[  985.004717] sd 3:0:0:0: Attached scsi generic sg2 type 0
[  985.110954] sd 3:0:0:0: [sdb] 62333952 512-byte logical blocks: (31.9 GB/29.7 GiB)
[  985.130468] sd 3:0:0:0: [sdb] Write Protect is off
[  985.130472] sd 3:0:0:0: [sdb] Mode Sense: 21 00 00 00
[  985.150058] sd 3:0:0:0: [sdb] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
[  985.257734]  sdb: sdb1
[  985.340854] sd 3:0:0:0: [sdb] Attached SCSI removable disk
[  986.960067] EXT4-fs (sdb1): mounted filesystem with ordered data mode. Opts: (null)

#可用看到插入的设备设备号是/dev/sdb
#或者列出所有块设备
lsblk

#格式化sd卡前面的内容,注意设备号
$dd bs=1k seek=8 count=1015 if=/dev/zero of=/dev/sdb

#将uboot写入到特定扇区
cd /root/Oriangepi/OrangePiH5/output/pack/
$dd bs=1k seek=8 if=boot0.bin of=/dev/sdb
$dd bs=1k seek=16400 if=uboot.bin of=/dev/sdb

$sync 
$umount /dev/sdb1

将卡插入开发板,可以看到uboot启动信息

▒HELLO! BOOT0 is starting!
boot0 commit : 661df598b3672fc3bc3e0c2425a77170a26d7a0d

boot0 version : 4.0
set pll start
set pll end
rtc[0] value = 0x00000000
rtc[1] value = 0x00000000
rtc[2] value = 0x00000000
rtc[3] value = 0x00000000
rtc[4] value = 0x00000000
rtc[5] value = 0x00000000
DRAM BOOT DRIVE INFO: V0.6
the chip id is 0x00000001
the chip id is 0x00000001
the chip id is 0x00000001
the chip id is 0x00000001
the chip id is 0x00000001
axp not exist
DRAM CLK =672 MHZ
DRAM Type =3 (2:DDR2,3:DDR3,6:LPDDR2,7:LPDDR3)
DRAM zq value: 0x003b3bf9
DRAM SIZE =1024 M
DRAM simple test OK.
dram size =1024
card no is 0
sdcard 0 line count 4
[mmc]: mmc driver ver 2016-03-15 20:40
[mmc]: sdc0 spd mode error, 2
[mmc]: Wrong media type 0x00000000
[mmc]: ***[2]Try SD card 0***
[mmc]: HSSDR52/SDR25 4 bit
[mmc]: 50000000 Hz
[mmc]: 30436 MB
[mmc]: ***SD/MMC 0 init OK!!!***
sum=aae18245
src_sum=aae18245
read boot-pkg from emmc 32800 sector
Succeed in loading uboot from sdmmc flash.
Entry_name        = u-boot
Entry_name        = monitor
Entry_name        = scp
set arisc reset to de-assert state
Ready to disable icache.
▒▒▒ɽc▒▒▒5)▒NOTICE:  BL3-1: v1.0(debug):3ffd944
NOTICE:  BL3-1: Built : 11:09:10, Aug 30 2016
NOTICE:  BL3-1 commit: 3ffd9442d4769d7fc0002770e3b69b55150a288e

INFO:    BL3-1: Initializing runtime services
ERROR:   Error initializing runtime service tspd_fast
INFO:    BL3-1: Preparing for EL3 exit to normal world
INFO:    BL3-1: Next image address = 0x4a000000
INFO:    BL3-1: Next image spsr = 0x1d3


U-Boot 2014.07-g661df59-dirty (Apr 28 2019 - 21:05:01) Allwinner Technology

uboot commit : 661df598b3672fc3bc3e0c2425a77170a26d7a0d

secure enable bit: 0
i2c: secure monitor exist
[      0.738]pmbus:   ready
u0:48105000
[      0.742][ARISC] :arisc initialize
[      0.772][ARISC] :arisc para ok
[SCP] :sunxi-arisc driver begin startup 2
[SCP] :arisc version: [sun8iw5_v0.03.00-244-gb750b8e]
[SCP] :sunxi-arisc driver v1.20 is starting
[      0.788][ARISC] :sunxi-arisc driver startup succeeded
axp: get node[charger0] error
[SCP ERROR] :message process error
[SCP ERROR] :message addr   : 48105080
[SCP ERROR] :message state  : 5
[SCP ERROR] :message attr   : 2
[SCP ERROR] :message type   : 80
[SCP ERROR] :message result : f3
[SCP WARING] :callback not install
[SCP ERROR] :arisc twi read pmu reg 0x3 err
probe axp806 failed
axp_probe error
[      0.822]PMU: cpux 1008 Mhz,AXI=336 Mhz
PLL6=600 Mhz,AHB1=200 Mhz, APB1=100Mhz MBus=400Mhz
run key detect
no key found
no uart input
DRAM:  1 GiB
fdt addr: 0x76e9f080
Relocation Offset is: 35ef2000
axp: get node[charger0] error
In:    serial
Out:   serial
Err:   serial
gic: sec monitor mode
[box standby] read rtc = 0x0
[box standby] start_type = 0x1
[box standby] to kernel
boot_init_gpio used
ir boot recovery not used
workmode = 0,storage type = 1
[      1.027]MMC:        0
[mmc]: mmc driver ver 2016-05-20 17:18:00-test0
[mmc]: get card2_boot_para:sdc_ex_dly_used 0
[mmc]: no mmc-hs400-1_8v!
[mmc]: no mmc-hs200-1_8v!
[mmc]: no mmc-ddr-1_8v!
[mmc]: delete max-frequency from dtb
SUNXI SD/MMC: 0
[mmc]: 50 MHz...
[mmc]: sample: 62 - 161(ps)
[mmc]: 100 MHz...
[mmc]: sample: 31 - 161(ps)
[mmc]: 200 MHz...
[mmc]: sample: 16 - 156(ps)
[mmc]: media type 0x0
[mmc]: Wrong media type 0x0
[mmc]: ************Try SD card 0************
[mmc]: host caps: 0x27
[mmc]: MID 03 PSN 4a541998
[mmc]: PNM SC32G -- 0x53-43-33-32-47
[mmc]: PRV 8.0
[mmc]: MDT m-12 y-2018
[mmc]: speed mode     : HSSDR52/SDR25
[mmc]: clock          : 50000000 Hz
[mmc]: bus_width      : 4 bit
[mmc]: user capacity  : 30436 MB
[mmc]: ************SD/MMC 0 init OK!!!************
[mmc]: erase_grp_size      : 0x1WrBlk*0x200=0x200 Byte
[mmc]: secure_feature      : 0x0
[mmc]: secure_removal_type : 0x0
[      1.235]sunxi flash init ok
[      1.251]start
drv_disp_init
tv_init:
tv_probe:000
no report hpd work,you need support the switch class!
screen 0 don't support TV!
tv_init:
fetch tv1 err.
drv_disp_init finish
hdcp is closed by sys config.
no the part:Reserve0
hpd_dev_num=2, id of def_output_dev is 0
hdmi hpd out, force open?
fdt_setprop_u32 disp.init_disp(0x20b0404) code:<no error>
fb_id=0, size=3686400, gd->ram_size=1073741824, SUNXI_DISPLAY_FRAME_BUFFER_SIZE=                                                                                                                                                             16777216
[      1.824]end
PowerBus = 0( 2:vBus 3:acBus other: not exist)
no battery, limit to dc
no battery exist
sunxi_bmp_logo_display
[boot disp] can not find the partition Reserve0
bmp_name=bootlogo.bmp
** Bad device size - sunxi_flash 0 **
sunxi bmp info error : unable to open logo file bootlogo.bmp
fail to find part named env
Using default environment

--------fastboot partitions--------
mbr not exist
base bootcmd=run mmcbootcmd
bootcmd set setargs_mmc
no misc partition is found
to be run cmd=run mmcbootcmd
cann't get the boot_base from the env
read item0 copy0
[mmc]: first and second bak compare failed fun sdmmc_secure_storage_read line 48                                                                                                                                                             3
read item0 copy1
[mmc]: first and second bak compare failed fun sdmmc_secure_storage_read line 48                                                                                                                                                             3
unknown error happen in item 0 read
get secure storage map err
check user data form private
the private part isn't exist
update dtb dram start
update dtb dram  end
serial is: 24005035c120582a084c
[      1.997]inter uboot shell
Hit any key to stop autoboot:  0
Loading orangepi uEnv.txt from 40000000 ...
** Unrecognized filesystem type **
** Unrecognized filesystem type **
Booting with defaults ...
Loading orangepi orangepi/OrangePiH5.dtb from 44000000 ...
** Unrecognized filesystem type **
Loading orangepi orangepi/uImage from 4007ffc0 ...
** Unrecognized filesystem type **
sunxi#

好了,uboot的搞定。

PS:编译时缺少软件请自行百度

全志R40平台的tinav2.1系统下打开SPI2接口 1、(可选修改) Q:\r40_tinav2.1\spi20_r40_tinav2.1\lichee\brandy\build.sh build_uboot() { if [ "x${PLATFORM}" = "xsun50iw1p1" ] || \ [ "x${PLATFORM}" = "xsun50iw2p1" ] || \ [ "x${PLATFORM}" = "xsun50iw6p1" ] || \ [ "x${PLATFORM}" = "xsun50iw3p1" ] || \ [ "x${PLATFORM}" = "xsun8iw12p1" ] || \ [ "x${PLATFORM}" = "xsun8iw10p1" ] || \ [ "x${PLATFORM}" = "xsun8iw11p1" ]; then cd u-boot-2014.07/ else cd u-boot-2011.09/ fi make distclean if [ "x$MODE" = "xota_test" ] ; then export "SUNXI_MODE=ota_test" fi make ${PLATFORM}_config make -j16 #make spl #make fes if [ ${PLATFORM} = "sun8iw11p1" ]; then make distclean make ${PLATFORM}_nor_config make -j16 #make spl #make fes fi cd - 1>/dev/null } 2、 Q:\r40_tinav2.1\spi20_r40_tinav2.1\lichee\linux-3.10\drivers\spi\spidev.c static struct spi_driver spidev_spi_driver = { .driver = { .name = "spidev", .owner = THIS_MODULE, .of_match_table = of_match_ptr(spidev_dt_ids), }, .probe = spidev_probe, .remove = spidev_remove, /* NOTE: suspend/resume methods are not necessary here. * We don't do anything except pass the requests to/from * the underlying controller. The refrigerator handles * most issues; the controller driver handles the rest. */ }; 3、验证APP程序: Q:\r40_tinav2.1\spi20_r40_tinav2.1\package\allwinner\spidev20_test\Makefile ############################################## # OpenWrt Makefile for helloworld program # # # Most of the variables used here are defined in # the include directives below. We just need to # specify a basic description of the package, # where to build our program, where to find # the source files, and where to install the # compiled program on the router. # # Be very careful of spacing in this file. # Indents should be tabs, not spaces, and # there should be no trailing whitespace in # lines that are not commented. # ############################################## include $(TOPDIR)/rules.mk # Name and release number of this package PKG_NAME:=spidev20_test PKG_VERSION:=0.0.1 PKG_RELEASE:=1 # This specifies the directory where we're going to build the program. # The root build directory, $(BUILD_DIR), is by default the build_mipsel # directory in your OpenWrt SDK directory PKG_BUILD_DIR := $(COMPILE_DIR)/$(PKG_NAME) include $(BUILD_DIR)/package.mk # Specify package information for this program. # The variables defined here should be self explanatory. # If you are running Kamikaze, delete the DESCRIPTION # variable below and uncomment the Kamikaze define # directive for the description below define Package/spidev20_test SECTION:=utils CATEGORY:=Allwinner TITLE:=spidev20_test just test the SPI2 interface DEPENDS:=+libpthread endef # Uncomment portion below for Kamikaze and delete DESCRIPTION variable above define Package/spidev20_test/description If you can't figure out what this program does, you're probably brain-dead and need immediate medical attention. endef # Specify what needs to be done to prepare for building the package. # In our case, we need to copy the source files to the build directory. # This is NOT the default. The default uses the PKG_SOURCE_URL and the # PKG_SOURCE which is not defined here to download the source from the web. # In order to just build a simple program that we have just written, it is # much easier to do it this way. define Build/Prepare mkdir -p $(PKG_BUILD_DIR) $(CP) ./src/* $(PKG_BUILD_DIR)/ endef define Build/Configure endef define Build/Compile $(MAKE) -C $(PKG_BUILD_DIR) \ CC="$(TARGET_CC)" \ CFLAGS="$(TARGET_CFLAGS)" -Wall \ LDFLAGS="$(TARGET_LDFLAGS)" \ LIBS="-lpthread" \ all endef # We do not need to define Build/Configure or Build/Compile directives # The defaults are appropriate for compiling a simple program such as this one # Specify where and how to install the program. Since we only have one file, # the helloworld executable, install it by copying it to the /bin directory on # the router. The $(1) variable represents the root directory on the router running # OpenWrt. The $(INSTALL_DIR) variable contains a command to prepare the install # directory if it does not already exist. Likewise $(INSTALL_BIN) contains the # command to copy the binary file from its current location (in our case the build # directory) to the install directory. define Package/spidev20_test/install $(INSTALL_DIR) $(1)/bin $(INSTALL_BIN) $(PKG_BUILD_DIR)/spidev20_test $(1)/bin/ endef # This line executes the necessary commands to compile our program. # The above define directives specify all the information needed, but this # line calls BuildPackage which in turn actually uses this information to # build a package. $(eval $(call BuildPackage,spidev20_test)) Q:\r40_tinav2.1\spi20_r40_tinav2.1\package\allwinner\spidev20_test\src\Makefile TARGET = spidev20_test INCLUDES += -I. -Icommon/ LIBS += -lpthread -lm -lrt SRCS = spidev20_test.c OBJS = $(SRCS:.c=.o) %.o: %.c $(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $< $(TARGET): $(OBJS) $(CC) -o $@ $(OBJS) $(LIBS) $(LDFLAGS) all:$(TARGET) clean: rm -rf $(TARGET) *.o *.a *~ cd common && rm -f *.o *.a *.bak *~ .depend Q:\r40_tinav2.1\spi20_r40_tinav2.1\package\allwinner\spidev20_test\src\spidev20_test.c /* * SPI testing utility (using spidev driver) * * Copyright (c) 2007 MontaVista Software, Inc. * Copyright (c) 2007 Anton Vorontsov <avorontsov@ru.mvista.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License. * * Cross-compile with cross-gcc -I/path/to/cross-kernel/include */ #include <stdint.h> #include <unistd.h> #include <stdio.h> #include <stdlib.h> #include <getopt.h> #include <fcntl.h> #include <sys/ioctl.h> #include <linux/types.h> #include <linux/spi/spidev.h> #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) static void pabort(const char *s) { perror(s); abort(); } //static const char *device = "/dev/spidev0.0"; //static const char *device = "/dev/spidev0.1"; static const char *device = "/dev/spidev2.0"; static uint8_t mode; static uint8_t bits = 8; static uint32_t speed = 500000; static uint16_t delay; static void transfer(int fd) { int ret; //uint8_t tx[] = { // 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0x40, 0x00, 0x00, 0x00, 0x00, 0x95, // 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0xDE, 0xAD, 0xBE, 0xEF, 0xBA, 0xAD, // 0xF0, 0x0D, //}; // CityBrand WelCome U! uint8_t tx[] = { 0x43, 0x69, 0x74, 0x79, 0x42, 0x72, 0x61, 0x6E, 0x64, 0x20, 0x57, 0x65, 0x6C, 0x43, 0x6F, 0x6D, 0x65, 0x20, 0x55, 0x21, 0x43, 0x69, 0x74, 0x79, 0x42, 0x72, 0x61, 0x6E, 0x64, 0x20, 0x57, 0x65, 0x6C, 0x43, 0x6F, 0x6D, 0x65, 0x20, 0x55, 0x21, 0x43, 0x69, 0x74, 0x79, 0x42, 0x72, 0x61, 0x6E, 0x64, 0x20, 0x57, 0x65, 0x6C, 0x43, 0x6F, 0x6D, 0x65, 0x20, 0x55, 0x21, }; uint8_t rx[ARRAY_SIZE(tx)] = {0, }; struct spi_ioc_transfer tr = { .tx_buf = (unsigned long)tx, .rx_buf = (unsigned long)rx, .len = ARRAY_SIZE(tx), .delay_usecs = delay, .speed_hz = speed, .bits_per_word = bits, }; ret = ioctl(fd, SPI_IOC_MESSAGE(1), &tr;); if (ret < 1) pabort("can't send spi message"); for (ret = 0; ret < ARRAY_SIZE(tx); ret++) { //if (!(ret % 6)) // puts(" "); //printf("%.2X ", rx[ret]); if (!(ret % 20)){ puts("\n"); } printf("%c", rx[ret]); } //puts(""); puts("\n"); } static void print_usage(const char *prog) { printf("Usage: %s [-DsbdlHOLC3]\n", prog); puts(" -D --device device to use (default /dev/spidev1.1)\n" " -s --speed max speed (Hz)\n" " -d --delay delay (usec)\n" " -b --bpw bits per word \n" " -l --loop loopback\n" " -H --cpha clock phase\n" " -O --cpol clock polarity\n" " -L --lsb least significant bit first\n" " -C --cs-high chip select active high\n" " -3 --3wire SI/SO signals shared\n"); exit(1); } static void parse_opts(int argc, char *argv[]) { while (1) { static const struct option lopts[] = { { "device", 1, 0, 'D' }, { "speed", 1, 0, 's' }, { "delay", 1, 0, 'd' }, { "bpw", 1, 0, 'b' }, { "loop", 0, 0, 'l' }, { "cpha", 0, 0, 'H' }, { "cpol", 0, 0, 'O' }, { "lsb", 0, 0, 'L' }, { "cs-high", 0, 0, 'C' }, { "3wire", 0, 0, '3' }, { "no-cs", 0, 0, 'N' }, { "ready", 0, 0, 'R' }, { NULL, 0, 0, 0 }, }; int c; c = getopt_long(argc, argv, "D:s:d:b:lHOLC3NR", lopts, NULL); if (c == -1) break; switch (c) { case 'D': device = optarg; break; case 's': speed = atoi(optarg); break; case 'd': delay = atoi(optarg); break; case 'b': bits = atoi(optarg); break; case 'l': mode |= SPI_LOOP; break; case 'H': mode |= SPI_CPHA; break; case 'O': mode |= SPI_CPOL; break; case 'L': mode |= SPI_LSB_FIRST; break; case 'C': mode |= SPI_CS_HIGH; break; case '3': mode |= SPI_3WIRE; break; case 'N': mode |= SPI_NO_CS; break; case 'R': mode |= SPI_READY; break; default: print_usage(argv[0]); break; } } } int main(int argc, char *argv[]) { int ret = 0; int fd; parse_opts(argc, argv); fd = open(device, O_RDWR); if (fd < 0) pabort("can't open device"); /* * spi mode */ ret = ioctl(fd, SPI_IOC_WR_MODE, &mode;); if (ret == -1) pabort("can't set spi mode"); ret = ioctl(fd, SPI_IOC_RD_MODE, &mode;); if (ret == -1) pabort("can't get spi mode"); /* * bits per word */ ret = ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &bits;); if (ret == -1) pabort("can't set bits per word"); ret = ioctl(fd, SPI_IOC_RD_BITS_PER_WORD, &bits;); if (ret == -1) pabort("can't get bits per word"); /* * max speed hz */ ret = ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed;); if (ret == -1) pabort("can't set max speed hz"); ret = ioctl(fd, SPI_IOC_RD_MAX_SPEED_HZ, &speed;); if (ret == -1) pabort("can't get max speed hz"); printf("spi mode: %d\n", mode); printf("bits per word: %d\n", bits); printf("max speed: %d Hz (%d KHz)\n", speed, speed/1000); transfer(fd); close(fd); return ret; } 4、修改配置文件: Q:\r40_tinav2.1\spi20_r40_tinav2.1\target\allwinner\azalea-m2ultra\configs\sys_config.fex [jtag_para] jtag_enable = 1 jtag_ms = port:PB14<3><default><default><default> jtag_ck = port:PB15<3><default><default><default> jtag_do = port:PB16<3><default><default><default> jtag_di = port:PB17<3><default><default><default> 修改为: [jtag_para] jtag_enable = 0 ;jtag_ms = port:PB14<3><default><default><default> ;jtag_ck = port:PB15<3><default><default><default> ;jtag_do = port:PB16<3><default><default><default> ;jtag_di = port:PB17<3><default><default><default> ;---------------------------------------------------------------------------------- ;SPI controller configuration ;---------------------------------------------------------------------------------- [spi0] spi0_used = 0 spi0_cs_number = 2 spi0_cs_bitmap = 3 spi0_cs0 = port:PC23<3><1><default><default> spi0_cs1 = port:PI14<2><1><default><default> spi0_sclk = port:PC2<3><default><default><default> spi0_mosi = port:PC0<3><default><default><default> spi0_miso = port:PC1<3><default><default><default> [spi1] spi1_used = 0 spi1_cs_number = 2 spi1_cs_bitmap = 3 spi1_cs0 = port:PA0<3><1><default><default> spi1_cs1 = port:PA4<3><1><default><default> spi1_sclk = port:PA1<3><default><default><default> spi1_mosi = port:PA2<3><default><default><default> spi1_miso = port:PA3<3><default><default><default> [spi2] spi2_used = 0 spi2_cs_number = 2 spi2_cs_bitmap = 3 spi2_cs0 = port:PB14<2><1><default><default> spi2_cs1 = port:PB13<2><1><default><default> spi2_sclk = port:PB15<2><default><default><default> spi2_mosi = port:PB16<2><default><default><default> spi2_miso = port:PB17<2><default><default><default> [spi3] spi3_used = 0 spi3_cs_number = 2 spi3_cs_bitmap = 3 spi3_cs0 = port:PA5<3><1><default><default> spi3_cs1 = port:PA9<3><1><default><default> spi3_sclk = port:PA6<3><default><default><default> spi3_mosi = port:PA7<3><default><default><default> spi3_miso = port:PA8<3><default><default><default> ;---------------------------------------------------------------------------------- ;SPI device configuration ;compatible --- device name ;spi-max-frequency --- work frequency ;reg --- chip select ;optional properties: spi-cpha, spi-cpol, spi-cs-high ;---------------------------------------------------------------------------------- ;[spi0/spi_board0] ;compatible = ;spi-max-frequency = ;reg = ;spi-cpha ;spi-cpol ;spi-cs-high 修改为: ;---------------------------------------------------------------------------------- ;SPI controller configuration ;---------------------------------------------------------------------------------- ;spi0有接SPI器件(和PC引脚和NAND冲突),但是空贴! [spi0] spi0_used = 0 spi0_cs_number = 2 spi0_cs_bitmap = 3 spi0_cs0 = port:PC23<3><1><default><default> spi0_cs1 = port:PI14<2><1><default><default> spi0_sclk = port:PC2<3><default><default><default> spi0_mosi = port:PC0<3><default><default><default> spi0_miso = port:PC1<3><default><default><default> ;和gmac0复用冲突了! [spi1] spi1_used = 0 spi1_cs_number = 2 spi1_cs_bitmap = 3 spi1_cs0 = port:PA0<3><1><default><default> spi1_cs1 = port:PA4<3><1><default><default> spi1_sclk = port:PA1<3><default><default><default> spi1_mosi = port:PA2<3><default><default><default> spi1_miso = port:PA3<3><default><default><default> ;大排针J9引出来了! [spi2] spi2_used = 1 spi2_cs_number = 2 spi2_cs_bitmap = 3 spi2_cs0 = port:PB14<2><1><default><default> spi2_cs1 = port:PB13<2><1><default><default> spi2_sclk = port:PB15<2><default><default><default> spi2_mosi = port:PB16<2><default><default><default> spi2_miso = port:PB17<2><default><default><default> ;和gmac0复用冲突了! [spi3] spi3_used = 0 spi3_cs_number = 2 spi3_cs_bitmap = 3 spi3_cs0 = port:PA5<3><1><default><default> spi3_cs1 = port:PA9<3><1><default><default> spi3_sclk = port:PA6<3><default><default><default> spi3_mosi = port:PA7<3><default><default><default> spi3_miso = port:PA8<3><default><default><default> ;---------------------------------------------------------------------------------- ;SPI device configuration ;compatible --- device name ;spi-max-frequency --- work frequency ;reg --- chip select ;optional properties: spi-cpha, spi-cpol, spi-cs-high ;---------------------------------------------------------------------------------- ;[spi0/spi_board0] ;compatible = ;spi-max-frequency = ;reg = ;spi-cpha ;spi-cpol ;spi-cs-high [spi2/spi_board2] compatible = "spidev" spi-max-frequency = 50000000 reg = 0 ;spi-cpha = 0 ;spi-cpol = 0 ;spi-cs-high = 0 5、刷机之后: root@TinaLinux:/# root@TinaLinux:/# find . -name spi* ./bin/spidev20_test ./dev/spidev2.0 ./proc/irq/44/spi2 ./rom/bin/spidev20_test ./rom/usr/lib/opkg/info/spidev20_test.control ./rom/usr/lib/opkg/info/spidev20_test.list ./sys/bus/spi ./sys/bus/spi/devices/spi2.0 ./sys/bus/spi/drivers/spidev ./sys/bus/spi/drivers/spidev/spi2.0 ./sys/bus/platform/devices/spi2 ./sys/bus/platform/drivers/spi ./sys/bus/platform/drivers/spi/spi2 ./sys/devices/soc/spi2 ./sys/devices/soc/spi2/spi_master ./sys/devices/soc/spi2/spi_master/spi2 ./sys/devices/soc/spi2/spi_master/spi2/spi2.0 ./sys/devices/soc/spi2/spi_master/spi2/spi2.0/spidev ./sys/devices/soc/spi2/spi_master/spi2/spi2.0/spidev/spidev2.0 ./sys/class/spi_master ./sys/class/spi_master/spi2 ./sys/class/spidev ./sys/class/spidev/spidev2.0 ./sys/kernel/debug/clk/hosc/pll_periph0/spi2 ./sys/kernel/debug/clk/hosc/spi0 ./sys/kernel/debug/clk/hosc/spi1 ./sys/kernel/debug/clk/hosc/spi3 ./sys/module/spidev ./usr/lib/opkg/info/spidev20_test.control ./usr/lib/opkg/info/spidev20_test.list root@TinaLinux:/# root@TinaLinux:/#
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