6410下经典2.4寸565屏初始化程序

最新推荐文章于 2022-02-23 15:02:25 发布
袁保康
最新推荐文章于 2022-02-23 15:02:25 发布
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分类专栏： LCD 文章标签： c output include
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#include <linux/wait.h>
#include <linux/fb.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>

#include <mach/regs-lcd.h>
#include <mach/regs-gpio.h>

#include "s3cfb.h"

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/clk.h>

#include <asm/io.h>
#include <asm/div64.h>
#include <asm/mach/map.h>
#include <asm/gpio.h>
#include <mach/regs-clock.h>
#include <plat/gpio-cfg.h>


#define S3CFB_SPI_CH  0

#define S3CFB_HFP   5 /* front porch */
#define S3CFB_HSW   5 /* hsync width */
#define S3CFB_HBP   5 /* back porch */

#define S3CFB_VFP   70 /* front porch */
#define S3CFB_VSW   5 /* vsync width */
#define S3CFB_VBP   20 /* back porch */

#define S3CFB_HRES  320 /* horizon pixel  x resolition */
#define S3CFB_VRES  240 /* line cnt       y resolution */

#define S3CFB_HRES_VIRTUAL 320 /* horizon pixel  x resolition */
#define S3CFB_VRES_VIRTUAL 480 /* line cnt       y resolution */

#define S3CFB_HRES_OSD  320 /* horizon pixel  x resolition */
#define S3CFB_VRES_OSD  240 /* line cnt       y resolution */

#define S3CFB_VFRAME_FREQ     60

#define S3CFB_PIXEL_CLOCK (S3CFB_VFRAME_FREQ * (S3CFB_HFP + S3CFB_HSW + S3CFB_HBP + S3CFB_HRES) * (S3CFB_VFP + S3CFB_VSW + S3CFB_VBP + S3CFB_VRES))

static void s3cfb_set_fimd_info(void)
{
 s3cfb_fimd.vidcon1 = S3C_VIDCON1_IHSYNC_INVERT | S3C_VIDCON1_IVSYNC_INVERT | S3C_VIDCON1_IVDEN_NORMAL;
 s3cfb_fimd.vidtcon0 = S3C_VIDTCON0_VBPD(S3CFB_VBP - 1) | S3C_VIDTCON0_VFPD(S3CFB_VFP - 1) | S3C_VIDTCON0_VSPW(S3CFB_VSW - 1);
 s3cfb_fimd.vidtcon1 = S3C_VIDTCON1_HBPD(S3CFB_HBP - 1) | S3C_VIDTCON1_HFPD(S3CFB_HFP - 1) | S3C_VIDTCON1_HSPW(S3CFB_HSW - 1);
 s3cfb_fimd.vidtcon2 = S3C_VIDTCON2_LINEVAL(S3CFB_VRES - 1) | S3C_VIDTCON2_HOZVAL(S3CFB_HRES - 1);

 s3cfb_fimd.vidosd0a = S3C_VIDOSDxA_OSD_LTX_F(0) | S3C_VIDOSDxA_OSD_LTY_F(0);
 s3cfb_fimd.vidosd0b = S3C_VIDOSDxB_OSD_RBX_F(S3CFB_HRES - 1) | S3C_VIDOSDxB_OSD_RBY_F(S3CFB_VRES - 1);

 s3cfb_fimd.vidosd1a = S3C_VIDOSDxA_OSD_LTX_F(0) | S3C_VIDOSDxA_OSD_LTY_F(0);
 s3cfb_fimd.vidosd1b = S3C_VIDOSDxB_OSD_RBX_F(S3CFB_HRES_OSD - 1) | S3C_VIDOSDxB_OSD_RBY_F(S3CFB_VRES_OSD - 1);

 s3cfb_fimd.width = S3CFB_HRES;
 s3cfb_fimd.height = S3CFB_VRES;
 s3cfb_fimd.xres = S3CFB_HRES;
 s3cfb_fimd.yres = S3CFB_VRES;

#if defined(CONFIG_FB_S3C_VIRTUAL_SCREEN)
 s3cfb_fimd.xres_virtual = S3CFB_HRES_VIRTUAL;
 s3cfb_fimd.yres_virtual = S3CFB_VRES_VIRTUAL;
#else
 s3cfb_fimd.xres_virtual = S3CFB_HRES;
 s3cfb_fimd.yres_virtual = S3CFB_VRES;
#endif

 s3cfb_fimd.osd_width = S3CFB_HRES_OSD;
 s3cfb_fimd.osd_height = S3CFB_VRES_OSD;
 s3cfb_fimd.osd_xres = S3CFB_HRES_OSD;
 s3cfb_fimd.osd_yres = S3CFB_VRES_OSD;

 s3cfb_fimd.osd_xres_virtual = S3CFB_HRES_OSD;
 s3cfb_fimd.osd_yres_virtual = S3CFB_VRES_OSD;

      s3cfb_fimd.pixclock = S3CFB_PIXEL_CLOCK;

 s3cfb_fimd.hsync_len = S3CFB_HSW;
 s3cfb_fimd.vsync_len = S3CFB_VSW;
 s3cfb_fimd.left_margin = S3CFB_HFP;
 s3cfb_fimd.upper_margin = S3CFB_VFP;
 s3cfb_fimd.right_margin = S3CFB_HBP;
 s3cfb_fimd.lower_margin = S3CFB_VBP;
}

#define OTM3225_IdxREGCMD 0x70 //Set an index register  
#define OTM3225_WriteCMD 0x72 //Write an instruction or RAM data

#define S3CFB_SPI_CLK(x) (S3C64XX_GPC(1 + (x * 4)))
#define S3CFB_SPI_MOSI(x) (S3C64XX_GPC(2 + (x * 4)))
#define S3CFB_SPI_CS(x)  (S3C64XX_GPC(3 + (x * 4)))

inline void s3cfb_spi_lcd_dclk(int ch, int value)
{
 gpio_set_value(S3CFB_SPI_CLK(ch), value);
// s3c_gpio_setpin(S3CFB_SPI_CLK(ch), value);
}

inline void s3cfb_spi_lcd_dseri(int ch, int value)
{
 gpio_set_value(S3CFB_SPI_MOSI(ch), value);
// s3c_gpio_setpin(S3CFB_SPI_MOSI(ch), value);
}

inline void s3cfb_spi_lcd_den(int ch, int value)
{
 gpio_set_value(S3CFB_SPI_CS(ch), value);
// s3c_gpio_setpin(S3CFB_SPI_CS(ch), value);
}

static void OTM3225A_WriteByte(unsigned char Data)
{ 
 int i = 0;
 for (i = 7; i >= 0; i--){
  s3cfb_spi_lcd_dclk(S3CFB_SPI_CH, 0);
  if ((Data >> i) & 0x1)
   s3cfb_spi_lcd_dseri(S3CFB_SPI_CH, 1);
  else
   s3cfb_spi_lcd_dseri(S3CFB_SPI_CH, 0);
  udelay(1);
  s3cfb_spi_lcd_dclk(S3CFB_SPI_CH, 1);
  udelay(1);
 }
}

static void OTM3225A_WriteCtrl(unsigned int Data)
{
 s3cfb_spi_lcd_den(S3CFB_SPI_CH, 0);

 OTM3225A_WriteByte(OTM3225_IdxREGCMD);
 OTM3225A_WriteByte((Data>>8)&0xFF);
 OTM3225A_WriteByte(Data&0xFF);

 s3cfb_spi_lcd_den(S3CFB_SPI_CH, 1);
 s3cfb_spi_lcd_dclk(S3CFB_SPI_CH, 1);
 s3cfb_spi_lcd_dseri(S3CFB_SPI_CH, 1);
 udelay(1);
}

static void OTM3225A_WriteData(unsigned int Data)
{
 s3cfb_spi_lcd_den(S3CFB_SPI_CH, 0);
 
 OTM3225A_WriteByte(OTM3225_WriteCMD);
 OTM3225A_WriteByte((Data>>8)&0xFF);
 OTM3225A_WriteByte(Data&0xFF);

 s3cfb_spi_lcd_den(S3CFB_SPI_CH, 1);
 s3cfb_spi_lcd_dclk(S3CFB_SPI_CH, 1);
 s3cfb_spi_lcd_dseri(S3CFB_SPI_CH, 1);
 udelay(1);
}

void OTM3225A_WriteGRAM(void)
{
 unsigned long int i;
 printk(KERN_INFO "OTM3225A_WriteGRAM begin\n");

 s3cfb_spi_lcd_den(S3CFB_SPI_CH, 0);
 
 OTM3225A_WriteByte(OTM3225_WriteCMD);
 
 for (i=0;i<320*240;i++){
  OTM3225A_WriteByte((0x55>>8)&0xFF);
  OTM3225A_WriteByte(0x55&0xFF);
 }

 s3cfb_spi_lcd_den(S3CFB_SPI_CH, 1);
 s3cfb_spi_lcd_dclk(S3CFB_SPI_CH, 1);
 s3cfb_spi_lcd_dseri(S3CFB_SPI_CH, 1);
 udelay(5);
 
 printk(KERN_INFO "OTM3225A_WriteGRAM end\n");
}

void s3cfb_spi_gpio_free(int ch)
{
 gpio_free(S3CFB_SPI_CLK(ch));
 gpio_free(S3CFB_SPI_MOSI(ch));
 gpio_free(S3CFB_SPI_CS(ch));
}

static void s3cfb_init_ldi(void)
{
 s3cfb_spi_lcd_den(S3CFB_SPI_CH, 1);
 s3cfb_spi_lcd_dclk(S3CFB_SPI_CH, 1);
 s3cfb_spi_lcd_dseri(S3CFB_SPI_CH, 1);

// OTM3225A_WriteCtrl(0x00E3);   OTM3225A_WriteData(0x3008);
// OTM3225A_WriteCtrl(0x00E7);   OTM3225A_WriteData(0x0012);
// OTM3225A_WriteCtrl(0x00EF);   OTM3225A_WriteData(0x1231);

 OTM3225A_WriteCtrl(0x0000);   OTM3225A_WriteData(0x0001);
 OTM3225A_WriteCtrl(0x0001);   OTM3225A_WriteData(0x0100);
 OTM3225A_WriteCtrl(0x0002);   OTM3225A_WriteData(0x0700);
 OTM3225A_WriteCtrl(0x0003);   OTM3225A_WriteData(0x1098);
 OTM3225A_WriteCtrl(0x0004);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0007);   OTM3225A_WriteData(0x0133);
 OTM3225A_WriteCtrl(0x0008);   OTM3225A_WriteData(0x0505);
 OTM3225A_WriteCtrl(0x0009);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x000A);   OTM3225A_WriteData(0x0008);
 OTM3225A_WriteCtrl(0x000C);   OTM3225A_WriteData(0x0111);
 OTM3225A_WriteCtrl(0x000D);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x000F);   OTM3225A_WriteData(0x0002);
 //-------------Power On sequence ---------------
 OTM3225A_WriteCtrl(0x0010);   OTM3225A_WriteData(0x1190);
 OTM3225A_WriteCtrl(0x0011);   OTM3225A_WriteData(0x0227); 
 OTM3225A_WriteCtrl(0x0012);   OTM3225A_WriteData(0x001D); 
 OTM3225A_WriteCtrl(0x0013);   OTM3225A_WriteData(0x1200);

 OTM3225A_WriteCtrl(0x0020);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0021);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0029);   OTM3225A_WriteData(0x0027);
 OTM3225A_WriteCtrl(0x002B);   OTM3225A_WriteData(0x000D);
 // ----------- Adjust the Gamma Curve ----------//
 OTM3225A_WriteCtrl(0x0030);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0031);   OTM3225A_WriteData(0x0506);
 OTM3225A_WriteCtrl(0x0032);   OTM3225A_WriteData(0x0307);
 OTM3225A_WriteCtrl(0x0035);   OTM3225A_WriteData(0x0103);
 OTM3225A_WriteCtrl(0x0036);   OTM3225A_WriteData(0x1c08);
 OTM3225A_WriteCtrl(0x0037);   OTM3225A_WriteData(0x0003);
 OTM3225A_WriteCtrl(0x0038);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0039);   OTM3225A_WriteData(0x0707);
 OTM3225A_WriteCtrl(0x003C);   OTM3225A_WriteData(0x0301);
 OTM3225A_WriteCtrl(0x003D);   OTM3225A_WriteData(0x0809); 
 //------------------ Set GRAM area ---------------//
 OTM3225A_WriteCtrl(0x0050);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0051);   OTM3225A_WriteData(0x00EF); 
 OTM3225A_WriteCtrl(0x0052);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0053);   OTM3225A_WriteData(0x013F);

 OTM3225A_WriteCtrl(0x0060);   OTM3225A_WriteData(0xA700);
 OTM3225A_WriteCtrl(0x0061);   OTM3225A_WriteData(0x0001);
 OTM3225A_WriteCtrl(0x006A);   OTM3225A_WriteData(0x0000);
 //-------------- Partial Display Control ---------//
 OTM3225A_WriteCtrl(0x0080);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0081);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0082);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0083);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0084);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0085);   OTM3225A_WriteData(0x0000);
 //-------------- Panel Control -------------------//
 OTM3225A_WriteCtrl(0x0090);   OTM3225A_WriteData(0x0010);
 OTM3225A_WriteCtrl(0x0092);   OTM3225A_WriteData(0x0000);
 OTM3225A_WriteCtrl(0x0095);   OTM3225A_WriteData(0x0110);
 OTM3225A_WriteCtrl(0x0097);   OTM3225A_WriteData(0x0000);
 
 OTM3225A_WriteCtrl(0x22); // Start GRAM write
// OTM3225A_WriteGRAM();
}

inline void s3cfb_spi_set_lcd_data(int ch)
{
 s3c_gpio_cfgpin(S3CFB_SPI_CLK(ch),S3C_GPIO_OUTPUT);
 s3c_gpio_cfgpin(S3CFB_SPI_MOSI(ch),S3C_GPIO_OUTPUT);
 s3c_gpio_cfgpin(S3CFB_SPI_CS(ch),S3C_GPIO_OUTPUT);

 s3c_gpio_setpull(S3CFB_SPI_CLK(ch),S3C_GPIO_PULL_NONE);
 s3c_gpio_setpull(S3CFB_SPI_MOSI(ch),S3C_GPIO_PULL_NONE);
 s3c_gpio_setpull(S3CFB_SPI_CS(ch),S3C_GPIO_PULL_NONE);
}

void s3cfb_init_hw_24(void)
{
 printk(KERN_INFO "LCD initialized\n");

 s3cfb_set_fimd_info();
 s3cfb_set_gpio();
 s3cfb_spi_set_lcd_data(S3CFB_SPI_CH);
 s3cfb_init_ldi();
}
原文地址： http://blog.163.com/allegro_tyc/blog/static/33743768201192732112909/