uboot2012.10移植到2440（2）

1、修改smdk2440.h

cd include/configs

vi smdk2440.h

#define CONFIG_ARM920T          /* This is an ARM920T Core */
#define CONFIG_S3C24X0          /* in a SAMSUNG S3C24x0-type SoC */
#define CONFIG_S3C2410          /* specifically a SAMSUNG S3C2410 SoC */
#define CONFIG_SMDK2410         /* on a SAMSUNG SMDK2410 Board */

改成

#define CONFIG_ARM920T          /* This is an ARM920T Core */
#define CONFIG_S3C24X0          /* in a SAMSUNG S3C24x0-type SoC */
#define CONFIG_S3C2440          /* specifically a SAMSUNG S3C2410 SoC */
#define CONFIG_SMDK2440         /* on a SAMSUNG SMDK2410 Board */

2、修改start.S

cd  arch/arm/cpu/arm920t

vi start.S

#ifdef CONFIG_S3C24X0
        /* turn off the watchdog */

# if defined(CONFIG_S3C2400)
#  define pWTCON        0x15300000
#  define INTMSK        0x14400008      /* Interrupt-Controller base addresses */
#  define CLKDIVN       0x14800014      /* clock divisor register */
#else
#  define pWTCON        0x53000000
#  define INTMSK        0x4A000008      /* Interrupt-Controller base addresses */
#  define INTSUBMSK     0x4A00001C
#  define CLKDIVN       0x4C000014      /* clock divisor register */
# endif

#define CLK_CTL_BASE    0x4C000000      /* tekkaman */
#define MDIV_405        0x7f << 12      /* tekkaman */
#define PSDIV_405       0x21            /* tekkaman */
#define MDIV_200        0xa1 << 12      /* tekkaman */
#define PSDIV_200       0x31            /* tekkaman */

        ldr     r0, =pWTCON
        mov     r1, #0x0
        str     r1, [r0]

        /*
         * mask all IRQs by setting all bits in the INTMR - default
         */
        mov     r1, #0xffffffff
        ldr     r0, =INTMSK
        str     r1, [r0]
# if defined(CONFIG_S3C2410)
        ldr     r1, =0x3ff
        ldr     r0, =INTSUBMSK
        str     r1, [r0]
# endif

#if defined(CONFIG_S3C2440)
        ldr     r1, =0x7fff
        ldr     r0, =INTSUBMSK
        str     r1, [r0]
#endif

#if defined(CONFIG_S3C2440)
        /* FCLK:HCLK:PCLK = 1:4:8 */
        ldr     r0, =CLKDIVN
        mov     r1, #5
        str     r1, [r0]

        mrc     p15, 0, r1, c1, c0, 0   
        orr     r1, r1, #0xc0000000             
        mcr     p15, 0, r1, c1, c0, 0   


        mov     r1, #CLK_CTL_BASE       
        mov     r2, #MDIV_405   
        add     r2, r2, #PSDIV_405      
        str     r2, [r1, #0x04]         /* MPLLCON tekkaman */

#else
        /* FCLK:HCLK:PCLK = 1:2:4 */
        /* default FCLK is 120 MHz ! */
        ldr     r0, =CLKDIVN
        mov     r1, #3
        str     r1, [r0]

        mrc     p15, 0, r1, c1, c0, 0   
        orr     r1, r1, #0xc0000000     
        mcr     p15, 0, r1, c1, c0, 0   /*write ctrl register tekkaman*/


        mov     r1, #CLK_CTL_BASE       /* tekkaman*/
        mov     r2, #MDIV_200   
        add     r2, r2, #PSDIV_200      
        str     r2, [r1, #0x04]
#endif
#endif  /* CONFIG_S3C24X0 */

make后提示

s3c2410_nand.c: In function 's3c2410_hwcontrol':
s3c2410_nand.c:57: warning: implicit declaration of function 's3c2410_get_base_nand'
s3c2410_nand.c:57: warning: initialization makes pointer from integer without a cast
s3c2410_nand.c:72: error: dereferencing pointer to incomplete type
s3c2410_nand.c:72: error: dereferencing pointer to incomplete type
s3c2410_nand.c:75: error: dereferencing pointer to incomplete type
s3c2410_nand.c:75: error: dereferencing pointer to incomplete type
s3c2410_nand.c: In function 's3c2410_dev_ready':
s3c2410_nand.c:85: warning: initialization makes pointer from integer without a cast
s3c2410_nand.c:87: error: dereferencing pointer to incomplete type
s3c2410_nand.c: In function 'board_nand_init':
s3c2410_nand.c:129: warning: initialization makes pointer from integer without a cast
s3c2410_nand.c:150: error: dereferencing pointer to incomplete type
s3c2410_nand.c:153: error: dereferencing pointer to incomplete type
s3c2410_nand.c:154: error: dereferencing pointer to incomplete type
make[1]: *** [s3c2410_nand.o] Error 1
修改drivers/mtd/nand/s3c2410_nand.c

#include <nand.h>
#include <asm/arch/s3c24x0_cpu.h>
#include <asm/io.h>

#define NF_BASE         0x4e000000

#if defined(CONFIG_S3C2410)
#define S3C2410_NFCONF_EN          (1<<15)
#define S3C2410_NFCONF_512BYTE     (1<<14)
#define S3C2410_NFCONF_4STEP       (1<<13)
#define S3C2410_NFCONF_INITECC     (1<<12)
#define S3C2410_NFCONF_nFCE        (1<<11)
#define S3C2410_NFCONF_TACLS(x)    ((x)<<8)
#define S3C2410_NFCONF_TWRPH0(x)   ((x)<<4)
#define S3C2410_NFCONF_TWRPH1(x)   ((x)<<0)

#define S3C2410_ADDR_NALE 4
#define S3C2410_ADDR_NCLE 8
#endif

#if defined(CONFIG_S3C2440)
#define S3C2410_NFCONT_EN          (1<<0)
#define S3C2410_NFCONT_INITECC     (1<<4)
#define S3C2410_NFCONT_nFCE        (1<<1)
#define S3C2410_NFCONT_MAINECCLOCK (1<<5)
#define S3C2410_NFCONF_TACLS(x)    ((x)<<12)
#define S3C2410_NFCONF_TWRPH0(x)   ((x)<<8)
#define S3C2410_NFCONF_TWRPH1(x)   ((x)<<4)

#define S3C2410_ADDR_NALE 0x08
#define S3C2410_ADDR_NCLE 0x0c
#endif


#ifdef CONFIG_NAND_SPL

static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)

{

     ...

                chip->IO_ADDR_W = (void *)IO_ADDR_W;
#if defined(CONFIG_S3C2410)
                if (ctrl & NAND_NCE)
                        writel(readl(&nand->nfconf) & ~S3C2410_NFCONF_nFCE,
                               &nand->nfconf);
                else
                        writel(readl(&nand->nfconf) | S3C2410_NFCONF_nFCE,
                               &nand->nfconf);
#endif
#if defined(CONFIG_S3C2440)
                if (ctrl & NAND_NCE)
                        writel(readl(&nand->nfcont) & ~S3C2410_NFCONT_nFCE,
                               &nand->nfcont);
                else
                        writel(readl(&nand->nfcont) | S3C2410_NFCONT_nFCE,
                               &nand->nfcont);
#endif
        }

   ...

}

void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
{
        struct s3c2410_nand *nand = s3c2410_get_base_nand();
        debug("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd, mode);
#if defined(CONFIG_S3C2410)
        writel(readl(&nand->nfconf) | S3C2410_NFCONF_INITECC, &nand->nfconf);
#endif
#if defined(CONFIG_S3C2440)
        writel(readl(&nand->nfcont) | S3C2410_NFCONT_INITECC, &nand->nfcont);
#endif
}

int board_nand_init(struct nand_chip *nand)
{

...       

debug("board_nand_init()\n");

        writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);

#if defined(CONFIG_S3C2410)
        /* initialize hardware */
#if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING)
        tacls  = CONFIG_S3C24XX_TACLS;
        twrph0 = CONFIG_S3C24XX_TWRPH0;
        twrph1 =  CONFIG_S3C24XX_TWRPH1;
#else
        tacls = 4;
        twrph0 = 8;
        twrph1 = 8;
#endif

        cfg = S3C2410_NFCONF_EN;
        cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
        cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
        cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
        writel(cfg, &nand_reg->nfconf);
        /* initialize nand_chip data structure */
        nand->IO_ADDR_R = (void *)&nand_reg->nfdata;
        nand->IO_ADDR_W = (void *)&nand_reg->nfdata;
#endif

#if defined(CONFIG_S3C2440)
        /* initialize hardware */
#if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING)
        tacls  = CONFIG_S3C24XX_TACLS;
        twrph0 = CONFIG_S3C24XX_TWRPH0;
        twrph1 =  CONFIG_S3C24XX_TWRPH1;
#else
        tacls = 0;
        twrph0 = 4;
        twrph1 = 2;
#endif  

        cfg = 0;
        cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
        cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
        cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
        writel(cfg, &nand_reg->nfconf);

        cfg = (0<<13)|(0<<12)|(0<<10)|(0<<9)|(0<<8)|(0<<6)|(0<<5)|(1<<4)|(0<<1)|(1<<0);
        writel(cfg, &nand_reg->nfcont);
        /* initialize nand_chip data structure */
        nand->IO_ADDR_R = (void *)&nand_reg->nfdata;
        nand->IO_ADDR_W = (void *)&nand_reg->nfdata;
#endif

        nand->select_chip = NULL;

...

}

#if defined(CONFIG_S3C2410)
        struct s3c2410_nand *nand = s3c2410_get_base_nand();
#else
        struct s3c2440_nand *nand = s3c2440_get_base_nand();
#endif

编译通过了！