1.4 Auto-Negotiation Advertisement Register 8
1.5 Auto-Negotiation Link Partner Base Page Ability Register 9
1.6 Auto-Negotiation Expansion Register 10
1.7 AN next page Register/AN Link Partner Received Next Page 10
1.8 MASTER-SLAVE Control Register 10
1.9 MASTER-SLAVE Status Register 12
1.10 Extended Status Register 13
1、以太网PHY标准寄存器分析
PHY是IEEE802.3中定义的一个标准模块,STA(station management entity,管理实体,一般为MAC或CPU)通过SMI(Serial Manage Interface)对PHY的行为、状态进行管理和控制,而具体管理和控制动作是通过读写PHY内部的寄存器实现的。PHY寄存器的地址空间为5位,从0到31最多可以定义32个寄存器(随着芯片功能不断增加,很多PHY芯片采用分页技术来扩展地址空间以定义更多的寄存器,在此不作讨论),IEEE802.3定义了地址为0-15这16个寄存器的功能,地址16-31的寄存器留给芯片制造商自由定义,如表1所示。以下结合实际应用,对IEEE802.3定义的寄存器各项功能进行分析。
表1 PHY 管理寄存器集 |
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Register address |
Register name |
Basic/Extended MII GMII |
|
0 |
Control |
B |
B |
1 |
Status |
B |
B |
2,3 |
PHY Identifier |
E |
E |
4 |
Auto-Negotiation Advertisement |
E |
E |
5 |
Auto-Negotiation Link Partner Base Page Ability |
E |
E |
6 |
Auto-Negotiation Expansion |
E |
E |
7 |
Auto-Negotiation Next Page Transmit |
E |
E |
8 |
Auto-Negotiation Link Partner Received Next Page |
E |
E |
9 |
MASTER-SLAVE Control Register |
E |
E |
10 |
MASTER-SLAVE Status Register |
E |
E |
11 through 14 |
Reserved |
E |
E |
15 |
Extended Status |
Reserved |
B |
16 through 31 |
Vendor Specific |
E |
E |
1.1 Control Register
寄存器0是PHY控制寄存器,通过Control Register可以对PHY的主要工作状态进行设置。Control Register的每一位完成的功能见表2。
表2 Control Register |
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Bit(s) |
Name |
Description |
R/Wa |
0.15 |
Reset |
1 = PHY reset |
R/W SC |
0.14 |
Loopback |
1 = enable loopback mode |
R/W |
0.13 |
Speed Selection (LSB) |
0.6 0.13 |
R/W |
0.12 |
Auto-Negotiation Enable |
1 = Enable Auto-Negotiation Process |
R/W |
0.11 |
Power Down |
1 = power down 0 = normal operation |
R/W |
0.10 |
Isolate |
1 = electrically Isolate PHY from MII or GMII |
R/W |
0.9 |
Restart Auto-Negotiation |
1 = Restart Auto-Negotiation Process |
R/W SC |
0.8 |
Duplex Mode |
1 = Full Duplex |
R/W |
0.7 |
Collision Test |
1 = enable COL signal test |
R/W |
0.6 |
Speed Selection (MSB) |
0.6 0.13 |
R/W |
0.5:0 |
Reserved |
Write as 0, ignore on Read |
R/W |
Reset:Bit15控制的是PHY复位功能&#x