Interface Connection

本文详细介绍了 Java 中 SQL Connection 接口的功能与使用方法,包括如何建立与特定数据库的连接、执行 SQL 语句及获取元数据等。此外还讲解了如何通过设置自动提交模式、事务隔离级别来管理数据库连接的状态。
java.sql
Interface Connection
All Superinterfaces:
Wrapper

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public interface Connection extends Wrapper

A connection (session) with a specific database. SQL statements are executed and results are returned within the context of a connection.

A Connection object's database is able to provide information describing its tables, its supported SQL grammar, its stored procedures, the capabilities of this connection, and so on. This information is obtained with the getMetaData method.

[b]Note[/b]: When configuring a Connection, JDBC applications should use the appropritate Connection method such as setAutoCommit or setTransactionIsolation. Applications should not invoke SQL commands directly to change the connection's configuration when there is a JDBC method available. By default a Connection object is in auto-commit mode, which means that it automatically commits changes after executing each statement. If auto-commit mode has been disabled, the method commit must be called explicitly in order to commit changes; otherwise, database changes will not be saved.

A new Connection object created using the JDBC 2.1 core API has an initially empty type map associated with it. A user may enter a custom mapping for a UDT in this type map. When a UDT is retrieved from a data source with the method ResultSet.getObject, the getObject method will check the connection's type map to see if there is an entry for that UDT. If so, the getObject method will map the UDT to the class indicated. If there is no entry, the UDT will be mapped using the standard mapping.

A user may create a new type map, which is a java.util.Map object, make an entry in it, and pass it to the java.sql methods that can perform custom mapping. In this case, the method will use the given type map instead of the one associated with the connection.

For example, the following code fragment specifies that the SQL type ATHLETES will be mapped to the class Athletes in the Java programming language. The code fragment retrieves the type map for the Connection object con, inserts the entry into it, and then sets the type map with the new entry as the connection's type map.


java.util.Map map = con.getTypeMap();
map.put("mySchemaName.ATHLETES", Class.forName("Athletes"));
con.setTypeMap(map);
### UVM Interface Connection in SystemVerilog In the context of using SystemVerilog with Universal Verification Methodology (UVM), interfaces play a crucial role in facilitating communication between testbench components and Design Under Test (DUT). Interfaces define signals that are used to communicate between different parts of the design or test environment, ensuring clean abstraction layers. To establish connections within the UVM-based verification setup: #### Defining an Interface An interface is defined as follows: ```systemverilog interface my_if; logic clk; logic rst_n; // Define other necessary wires/signals here modport tb ( input clk, input rst_n // Specify directions for additional signals... ); modport dut ( output clk, output rst_n // Specify signal directions from DUT perspective... ); endinterface : my_if ``` This code snippet defines `my_if`, which includes clock (`clk`) and reset (`rst_n`) signals along with their respective modes through `modport` declarations[^1]. #### Connecting Interface Instances For connecting instances of this interface into both the DUT and testbench modules: ```systemverilog // Inside top-level module where DUT and TB reside initial begin uvm_config_db #(virtual my_if)::set(null, "uvm_test_top", "vif", vif); end ``` The above line sets up configuration database entries so any component can access virtual interfaces by name during simulation initialization phase. #### Accessing Virtual Interfaces Within Components Components like monitors, drivers need direct interaction with these ports via virtual interfaces declared inside class definitions. ```systemverilog class my_driver extends uvm_driver #(my_transaction); virtual my_if m_vif; function new(string name, uvm_component parent); super.new(name,parent); endfunction virtual function void build_phase(uvm_phase phase); if (!uvm_config_db #(virtual my_if)::get(this,"","m_vif",m_vif)) `uvm_fatal("NOVIF",{"virtual interface must be set for: ", get_full_name(), ".m_vif"}) endfunction endclass : my_driver ``` Here, `build_phase()` ensures every instance has its own handle towards actual physical port before starting operation phases such as run_phase() etc., thus establishing proper connectivity throughout entire hierarchy tree structure formed out of various blocks/components involved under one roof called 'test'.
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