rk3568驱动lLl9811-C（10.1英寸屏幕）

最新推荐文章于 2025-03-04 15:12:33 发布
花梨花哨
最新推荐文章于 2025-03-04 15:12:33 发布
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文章标签： c语言开发语言
本文链接：https://blog.youkuaiyun.com/hero_human/article/details/142529957
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这里需要比较注意的是引脚IO的使能要配对，还有就是display_timing要修改，配置成你自己屏幕的参数，时钟和分辨率，还有一个比较关键的就是reset时间比较重要。
mipi_dsi设备树配置
第一步：dis0配置mipi_dsi驱动lLl9881-C，然后这里需要注意的是我们需要把vop的功能也需要开起来
&dsi0 {
    status = "disabled";
    //rockchip,lane-rate = <1000>;
    dsi0_panel: panel@0 {
        status = "okay";
        compatible = "simple-panel-dsi";
        reg = <0>;
        backlight = <&backlight>;

        reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
        /*
        reset-delay-ms = <60>;
        enable-delay-ms = <60>;
        prepare-delay-ms = <60>;
        unprepare-delay-ms = <60>;
        disable-delay-ms = <60>;
        */
        prepare-delay-ms = <5>;
        reset-delay-ms = <1>;
        init-delay-ms = <80>;
        disable-delay-ms = <10>;
        unprepare-delay-ms = <5>;

        dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
            MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
        dsi,format = <MIPI_DSI_FMT_RGB888>;
        dsi,lanes  = <4>;
        panel-init-sequence = [
            29 00 04 FF 98 81 03
            23 00 02 01 00
            23 00 02 02 00
            23 00 02 03 53
            23 00 02 04 D3
            23 00 02 05 00
            23 00 02 06 0D
            23 00 02 07 08
            23 00 02 08 00
            23 00 02 09 00
            23 00 02 0A 00
            23 00 02 0B 00
            23 00 02 0C 00
            23 00 02 0D 00
            23 00 02 0E 00
            23 00 02 0F 28
            23 00 02 10 28
            23 00 02 11 00
            23 00 02 12 00
            23 00 02 13 00
            23 00 02 14 00
            23 00 02 15 00
            23 00 02 16 00
            23 00 02 17 00
            23 00 02 18 00
            23 00 02 19 00
            23 00 02 1A 00
            23 00 02 1B 00
            23 00 02 1C 00
            23 00 02 1D 00
            23 00 02 1E 40
            23 00 02 1F 80
            23 00 02 20 06
            23 00 02 21 01
            23 00 02 22 00
            23 00 02 23 00
            23 00 02 24 00
            23 00 02 25 00
            23 00 02 26 00
            23 00 02 27 00
            23 00 02 28 33
            23 00 02 29 33
            23 00 02 2A 00
            23 00 02 2B 00
            23 00 02 2C 00
            23 00 02 2D 00
            23 00 02 2E 00
            23 00 02 2F 00
            23 00 02 30 00
            23 00 02 31 00
            23 00 02 32 00
            23 00 02 33 00
            23 00 02 34 03
            23 00 02 35 00
            23 00 02 36 00
            23 00 02 37 00
            23 00 02 38 96
            23 00 02 39 00
            23 00 02 3A 00
            23 00 02 3B 00
            23 00 02 3C 00
            23 00 02 3D 00
            23 00 02 3E 00
            23 00 02 3F 00
            23 00 02 40 00
            23 00 02 41 00
            23 00 02 42 00
            23 00 02 43 00
            23 00 02 44 00
            23 00 02 50 00
            23 00 02 51 23
            23 00 02 52 45
            23 00 02 53 67
            23 00 02 54 89
            23 00 02 55 AB
            23 00 02 56 01
            23 00 02 57 23
            23 00 02 58 45
            23 00 02 59 67
            23 00 02 5A 89
            23 00 02 5B AB
            23 00 02 5C CD
            23 00 02 5D EF
            23 00 02 5E 00
            23 00 02 5F 08
            23 00 02 60 08
            23 00 02 61 06
            23 00 02 62 06
            23 00 02 63 01
            23 00 02 64 01
            23 00 02 65 00
            23 00 02 66 00
            23 00 02 67 02
            23 00 02 68 15
            23 00 02 69 15
            23 00 02 6A 14
            23 00 02 6B 14
            23 00 02 6C 0D
            23 00 02 6D 0D
            23 00 02 6E 0C
            23 00 02 6F 0C
            23 00 02 70 0F
            23 00 02 71 0F
            23 00 02 72 0E
            23 00 02 73 0E
            23 00 02 74 02
            23 00 02 75 08
            23 00 02 76 08
            23 00 02 77 06
            23 00 02 78 06
            23 00 02 79 01
            23 00 02 7A 01
            23 00 02 7B 00
            23 00 02 7C 00
            23 00 02 7D 02
            23 00 02 7E 15
            23 00 02 7F 15
            23 00 02 80 14
            23 00 02 81 14
            23 00 02 82 0D
            23 00 02 83 0D
            23 00 02 84 0C
            23 00 02 85 0C
            23 00 02 86 0F
            23 00 02 87 0F
            23 00 02 88 0E
            23 00 02 89 0E
            23 00 02 8A 02
            29 00 04 FF 98 81 04
            23 00 02 6E 2B
            23 00 02 6F 37
            23 00 02 3A A4
            23 00 02 8D 1A
            23 00 02 87 BA
            23 00 02 B2 D1
            23 00 02 88 0B
            23 00 02 38 01
            23 00 02 39 00
            23 00 02 B5 07
            23 00 02 31 75
            23 00 02 3B 98
            29 00 04 FF 98 81 01
            23 00 02 22 0A
            23 00 02 31 00
            23 00 02 53 4D
            23 00 02 55 4D
            23 00 02 50 85
            23 00 02 51 80
            23 00 02 60 10
            23 00 02 62 20
            23 00 02 A0 00
            23 00 02 A1 06
            23 00 02 A2 1B
            23 00 02 A3 14
            23 00 02 A4 18
            23 00 02 A5 2E
            23 00 02 A6 22
            23 00 02 A7 24
            23 00 02 A8 85
            23 00 02 A9 1E
            23 00 02 AA 2A
            23 00 02 AB 74
            23 00 02 AC 1B
            23 00 02 AD 19
            23 00 02 AE 4C
            23 00 02 AF 21
            23 00 02 B0 27
            23 00 02 B1 4B
            23 00 02 B2 58
            23 00 02 B3 23
            23 00 02 C0 00
            23 00 02 C1 1F
            23 00 02 C2 29
            23 00 02 C3 12
            23 00 02 C4 14
            23 00 02 C5 25
            23 00 02 C6 19
            23 00 02 C7 1B
            23 00 02 C8 84
            23 00 02 C9 1D
            23 00 02 CA 28
            23 00 02 CB 73
            23 00 02 CC 1A
            23 00 02 CD 18
            23 00 02 CE 4D
            23 00 02 CF 23
            23 00 02 D0 29
            23 00 02 D1 4C
            23 00 02 D2 5B
            23 00 02 D3 23
            29 00 04 FF 98 81 00
            23 00 02 35 00
            //29 00 04 FF 98 81 04 //bist
            //23 00 02 2F 01 //
            05 78 01 11
            05 14 01 29
        ];

        panel-exit-sequence = [
            05 00 01 28
            05 00 01 10
        ];

        disp_timings0: display-timings {
            native-mode = <&dsi0_timing0>;
            dsi0_timing0: timing0 {
                clock-frequency = <67000000>;
                hactive = <800>;
                vactive = <1280>;
                hfront-porch = <24>;
                hsync-len = <20>;
                hback-porch = <10>;
                vfront-porch = <12>;
                vsync-len = <2>;
                vback-porch = <20>;
                hsync-active = <0>;
                vsync-active = <0>;
                de-active = <0>;
                pixelclk-active = <0>;
            };
        };

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;
                panel_in_dsi: endpoint {
                    remote-endpoint = <&dsi_out_panel>;
                };
            };
        };
    };

    ports {
        #address-cells = <1>;
        #size-cells = <0>;

        port@1 {
            reg = <1>;
            dsi_out_panel: endpoint {
                remote-endpoint = <&panel_in_dsi>;
            };
        };
    };

};


/*
 * video_phy0 needs to be enabled
 * when dsi0 is enabled
 */
&dsi0 {
    status = "okay";
};

&dsi0_in_vp0 {
    status = "disabled";
};

&dsi0_in_vp1 {
    status = "okay";
};

&dsi0_panel {
    power-supply = <&vcc3v3_lcd0_n>;
};

&video_phy0 {
    status = "okay";
};

&vop {
    status = "okay";
    assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
    assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>, <&cru PLL_GPLL>;
};

&vop_mmu {
    status = "okay";
};

display_subsystem: display-subsystem {
        compatible = "rockchip,display-subsystem";
        memory-region = <&drm_logo>, <&drm_cubic_lut>;
        memory-region-names = "drm-logo", "drm-cubic-lut";
        ports = <&vop_out>;
        devfreq = <&dmc>;

        route {
            route_dsi0: route-dsi0 {
                status = "disabled";
                logo,uboot = "logo.bmp";
                logo,kernel = "logo_kernel.bmp";
                logo,mode = "center";
                charge_logo,mode = "center";
                connect = <&vp0_out_dsi0>;
            };
            route_dsi1: route-dsi1 {
                status = "disabled";
                logo,uboot = "logo.bmp";
                logo,kernel = "logo_kernel.bmp";
                logo,mode = "center";
                charge_logo,mode = "center";
                connect = <&vp0_out_dsi1>;
            };
            route_edp: route-edp {
                status = "disabled";
                logo,uboot = "logo.bmp";
                logo,kernel = "logo_kernel.bmp";
                logo,mode = "center";
                charge_logo,mode = "center";
                connect = <&vp0_out_edp>;
            };
            route_hdmi: route-hdmi {
                status = "disabled";
                logo,uboot = "logo.bmp";
                logo,kernel = "logo_kernel.bmp";
                logo,mode = "center";
                charge_logo,mode = "center";
                connect = <&vp1_out_hdmi>;
            };
            route_lvds: route-lvds {
                status = "disabled";
                logo,uboot = "logo.bmp";
                logo,kernel = "logo_kernel.bmp";
                logo,mode = "center";
                charge_logo,mode = "center";
                connect = <&vp1_out_lvds>;
            };
            route_rgb: route-rgb {
                status = "disabled";
                logo,uboot = "logo.bmp";
                logo,kernel = "logo_kernel.bmp";
                logo,mode = "center";
                charge_logo,mode = "center";
                connect = <&vp2_out_rgb>;
            };
        };
    };
可以查看你的节点屏幕有没有挂载成功mipi_dsi
cat d/dri/0/summary