Intel® IA-32 Architecture Learning 2 Protected-Mode Memory Management

本文详细介绍了处理器中段选择器和段寄存器的作用及其加载方式,并探讨了段描述符的功能。此外,还讨论了分页选项,包括分页标志、页面大小扩展标志及页面地址扩展标志。

Author: Harold Wang

http://blog.youkuaiyun.com/hero7935

There is no mode bit to disable segmentation, the use of paging, however, is optional.

1. Segment Selectors and Segment Registers

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The first entry of the GDT is not used by the processor.
To reduce address translation time and coding complexity, the processor provides registers for holding up to 6 segment selectors. Each of these segment registers support a specific kind of memory reference(code,stack,or data). For virtually any kind of program execution to take place, at least the code-segment(CS),data-segment(DS),and stack-segment(SS) registers must be loaded with valid segment selectors. Three additional data-segment registers(ES,FS,and GS) are also available to the currently executingg program if needed.

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Two kind of load instructions are provided for loading the segment registers:
1. Direct load instructions such as the MOV, POP, LDS, LES, LSS, LGS, and LFS instructions. These  instructions explicitly reference the segment registers.
2. Implied load instructions such as the far pointer versions of the CALL, JMP, and RET instructions, the SYSENTER and SYSEXIT instructions, and the IRET, INTn, INTO and INT3instructions. These instructions change the contents of the CS regester(and sometimes other segment registers) as an incidental part of the their operation.

2. Segment Descriptors

A segment descriptor is a data structure in a GDT or LDT that provides the processor with the size and location of a segment, as well as access control and status information.

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When the S(descriptor type) flag in a segment descriptor is set, the descriptor is for either a code or a data segment; when the flag is clear, the descriptor type is a system descriptor. The process recognizes the following types of system descriptors which are devided into two categories: System-segment descriptors and Gate descriptors.

--LDT segment descriptor
--TSS descriptor
--Call-gate descriptor
--Interrupt-gate descriptor
--Trap-gate descriptor
--Task-gate descriptor

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3. Paging Options

Author: Harold Wang

http://blog.youkuaiyun.com/hero7935

--PG(paging) flag: Bit 31 of CR0
--PSE(page size extensions) flag: Bit 4 of CR4
--PAE(page address extension) flag: Bit 5 of CR4

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4. Linear Address Translation(4-KByte Pages)

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5. Page-Directory and Page-Table Entries

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Author: Harold Wang

http://blog.youkuaiyun.com/hero7935

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