F28069教程3-中断 PIE

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于 2022-08-23 15:53:16 首次发布

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Interrupts

https://dev.ti.com/tirex/explore/content/c2000_academy_2.00.01.41_all/modules/Module_3_Deep_Dive/module_3_deep_dive.html

PIE:Peripheral Interrupt Expansion block

Interrupts

What are interrupts?

An interrupt is a response by the processor to an event that needs attention. The processor executes instructions that are defined within the interrupt service routine (ISR) as soon as is capable, and then goes back to normal operational tasks. Unlike idle loops where code waits for an event to occur, interrupts provide the opportunity to have non-idle code loops that execute based on the CPU’s availability and priority of tasks.

Interrupt Architecture within C2000 devices

Refer to the ‘Device Interrupt Architecture’ figure of the device’s Technical Reference Manual (TRM) for a visual representation of the interrupt architecture described below.

The internal interrupt sources include the general purpose timers 0, 1, and 2, and all of the peripherals on the device.

External interrupt sources include the five external interrupt lines. From the Input X-BAR, INPUT4 maps to XINT1, INPUT5 maps to XINT2, INPUT6 maps to XINT3, INPUT13 maps to XINT4, and INPUT14 maps to XINT5.

The Perip