F28069M教程4-System Initialization

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已于 2022-08-23 16:24:09 修改 · 337 阅读

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#TI #F28069M

于 2022-08-23 16:14:47 首次发布

文章目录

Overview
Oscillator/PLL Clock Module

原始教程入口： https://dev.ti.com/tirex/explore/node?node=AOpze8ebskysmgASY3VKSA__jEBbtmC__LATEST

本教程链接：
https://dev.ti.com/tirex/explore/content/c2000_academy_2.00.01.41_all/modules/Module_4_System_Initialization/module_4_system_initialization.html

Overview

This module covers the operation of the OSC/PLL-based clock module and watchdog timer. Also, the general-purpose digital I/O, external interrupts, low power modes and the register protection will be covered.

Oscillator/PLL Clock Module

The device clock signals are derived from one of four clock sources:

Internal Oscillator 1 (INTOSC1)
Internal Oscillator 2 (INTOSC2)
External Oscillator (XTAL)
Auxiliary Clock Input (AUXCLKIN)

At power-up, the device is clocked from the on-chip 10 MHz oscillator INTOSC2. INTSOC2 is the primary internal clock source, and is the default system