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最新推荐文章于 2024-12-09 11:20:20 发布

David_VC5

最新推荐文章于 2024-12-09 11:20:20 发布

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本文链接：https://blog.youkuaiyun.com/david_vc5/article/details/4444869

LV595A是一款适用于2V至5.5V供电电压的8位移位寄存器。它包含串行输入并行输出的移位寄存器，该寄存器为D型存储寄存器提供输入。存储寄存器具有并行三态输出，并且为移位寄存器和存储寄存器提供了独立的时钟信号。

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I Love 移位寄存器

The ’LV595A devices are 8-bit shift registers designed for 2-V to 5.5-V V_CC operation.

These devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR)/ input, serial (SER) input, and a serial output for cascading. When the output-enable (OE)/ input is high, all outputs except Q_H’ are in the high-impedance state.

Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.

To ensure the high-impedance state during power up or power down, OE/ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

http://hi.baidu.com/dsp_arm_embed/blog/item/0c8c313938b90fcad46225f1.html