【LVL1_5_c】【思考题】【7】char *p1="hellow world"和char p2[]="hellow world"的区别

本文详细解析了C语言中如何使用字符串常量,并将其赋予指针,同时解释了字符串常量在内存中的存储方式,以及在栈上分配内存空间的区别与应用。

语句1:char *p1="hellow world";

语句1:char p2[]="hellow world";

(理解这个问题,首先要大致了解什么是栈,什么是全局变量)

一、

"hellow world"是一个常量,

"hellow world"像全局变量一样保存在内存的静态数据区。

语句1表示将"hellow world"这个常量的首地址,赋给指针变量P.


二、

语句二表示,在栈中分配一段连续的内存空间,然后将"helloworld"保存进去.

int printk(const char *fmt, ...); /* * Special printk facility for scheduler/timekeeping use only, _DO_NOT_USE_ ! */ __printf(1, 2) __cold int printk_deferred(const char *fmt, ...); /* * Please don't use printk_ratelimit(), because it shares ratelimiting state * with all other unrelated printk_ratelimit() callsites. Instead use * printk_ratelimited() or plain old __ratelimit(). */ extern int __printk_ratelimit(const char *func); #define printk_ratelimit() __printk_ratelimit(__func__) extern bool printk_timed_ratelimit(unsigned long *caller_jiffies, unsigned int interval_msec); extern int printk_delay_msec; extern int dmesg_restrict; extern int devkmsg_sysctl_set_loglvl(struct ctl_table *table, int write, void *buf, size_t *lenp, loff_t *ppos); extern void wake_up_klogd(void); char *log_buf_addr_get(void); u32 log_buf_len_get(void); void log_buf_vmcoreinfo_setup(void); void __init setup_log_buf(int early); __printf(1, 2) void dump_stack_set_arch_desc(const char *fmt, ...); void dump_stack_print_info(const char *log_lvl); void show_regs_print_info(const char *log_lvl); extern asmlinkage void dump_stack_lvl(const char *log_lvl) __cold; extern asmlinkage void dump_stack(void) __cold; extern void printk_safe_flush(void); extern void printk_safe_flush_on_panic(void); #else static inline __printf(1, 0) int vprintk(const char *s, va_list args) { return 0; } static inline __printf(1, 2) __cold int printk(const char *s, ...) { return 0; } 底下有 int printk(const char *s, ...) { return 0; }
最新发布
10-15
/* * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2022-2022. All rights reserved. * Description: hsan pinctrl driver. * Author : hsan * Create : 2022-03-10 * History: Init. */ #include <linux/io.h> #include <linux/module.h> #include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinconf-generic.h> #include "hi_types.h" #include "hi_pinctrl_1.0.h" #define LVL1_0 0x40 #define LVL1_1 0x44 #define LVL1_2 0x48 #define LVL2_0 0x4c #define LVL2_1 0x50 #define LVL2_2 0x54 #define LVL3_0 0x58 #define LVL3_1 0x5c #define LVL3_2 0x60 #define LVL4_0 0x64 #define LVL4_1 0x68 #define LVL4_2 0x6c #define LVL5_0 0x70 #define LVL5_1 0x74 #define LVL5_2 0x78 union hi_pin_cfg_reg_emei { uint32_t value; struct { uint32_t pu : 1; /* pull up */ uint32_t pd : 1; /* pull down */ uint32_t ds : 3; uint32_t sten : 1; /* Schmitt trigger enable */ uint32_t pocfgb : 1; /* power on configuration bit */ uint32_t ien : 1; /* input enable */ uint32_t in : 1; /* input value */ uint32_t oen : 1; /* output enable */ uint32_t out : 1; /* output value */ uint32_t rsv0 : 21; } bits; }; hi_peri_pindata(0, 0x000, LVL1_0, 0, hi_func_name(gpio), LVL2_0, 0, hi_func_name(pwm), /* io_vdd18_pwm_sel */ LVL3_0, 0, hi_func_name(null), LVL4_0, 0, hi_func_name(null), LVL5_0, 0, hi_func_name(null)); hi_peri_pindata(1, 0x004, LVL1_0, 1, hi_func_name(gpio), LVL2_0, 1, hi_func_name(pwm), /* io_vdd19_pwm_sel */ LVL3_0, 1, hi_func_name(null), LVL4_0, 1, hi_func_name(null), LVL5_0, 1, hi_func_name(null)); hi_peri_pindata(2, 0x008, LVL1_0, 2, hi_func_name(gpio), LVL2_0, 2, hi_func_name(rgmii0), /* RGMII_TX3 */ LVL3_0, 2, hi_func_name(eth_act_led0), /* UNI LED_ETH0_ACT0 */ LVL4_0, 2, hi_func_name(phy_clk), /* GEPHY_REF_CLK */ LVL5_0, 2, hi_func_name(null)); hi_peri_pindata(3, 0x00c, LVL1_0, 3, hi_func_name(gpio), LVL2_0, 3, hi_func_name(rgmii0), /* RGMII_TX2 */ LVL3_0, 3, hi_func_name(eth_act_led1), /* UNI LED_ETH0_ACT1 */ LVL4_0, 3, hi_func_name(null), LVL5_0, 3, hi_func_name(null)); hi_peri_pindata(4, 0x010, LVL1_0, 4, hi_func_name(gpio), LVL2_0, 4, hi_func_name(rgmii0), /* RGMII_TX1 */ LVL3_0, 4, hi_func_name(eth_act_led2), /* UNI LED_ETH0_ACT2 */ LVL4_0, 4, hi_func_name(null), /* DG1_PFO_N */ LVL5_0, 4, hi_func_name(null)); hi_peri_pindata(5, 0x014, LVL1_0, 5, hi_func_name(gpio), LVL2_0, 5, hi_func_name(rgmii0), /* RGMII_TX0 */ LVL3_0, 5, hi_func_name(eth_act_led3), /* UNI LED_ETH0_ACT3 */ LVL4_0, 5, hi_func_name(clk_test), /* FUN_TEST_CLK */ LVL5_0, 5, hi_func_name(null)); hi_peri_pindata(6, 0x018, LVL1_0, 6, hi_func_name(gpio), LVL2_0, 6, hi_func_name(rgmii0), /* RGMII_TX_CLK */ LVL3_0, 6, hi_func_name(eth_link_led0), /* UNI LED_ETH0_LINK0 */ LVL4_0, 6, hi_func_name(null), /* EXT0_SEROUT */ LVL5_0, 6, hi_func_name(null)); hi_peri_pindata(7, 0x01c, LVL1_0, 7, hi_func_name(gpio), LVL2_0, 7, hi_func_name(rgmii0), /* RGMII_TX_EN */ LVL3_0, 7, hi_func_name(eth_link_led1), /* UNI LED_ETH0_LINK1 */ LVL4_0, 7, hi_func_name(null), /* EXT0_SERIN */ LVL5_0, 7, hi_func_name(null)); hi_peri_pindata(8, 0x020, LVL1_0, 8, hi_func_name(gpio), LVL2_0, 8, hi_func_name(rgmii0), /* RGMII_RX_CLK */ LVL3_0, 8, hi_func_name(eth_link_led2), /* UNI LED_ETH0_LINK2 */ LVL4_0, 8, hi_func_name(null), /* EXT0_LOAD */ LVL5_0, 8, hi_func_name(null)); hi_peri_pindata(9, 0x024, LVL1_0, 9, hi_func_name(gpio), LVL2_0, 9, hi_func_name(rgmii0), /* RGMII_RX_DV */ LVL3_0, 9, hi_func_name(eth_link_led3), /* UNI LED_ETH0_LINK3 */ LVL4_0, 9, hi_func_name(null), /* EXT0_SRCLK */ LVL5_0, 9, hi_func_name(null)); hi_peri_pindata(10, 0x028, LVL1_0, 10, hi_func_name(gpio), LVL2_0, 10, hi_func_name(rgmii0), /* RGMII_RX0 */ LVL3_0, 10, hi_func_name(nni_act_led0), /* LED_NNI_GE_ACT0 */ LVL4_0, 10, hi_func_name(usb1), /* USB1_OVRCUR */ LVL5_0, 10, hi_func_name(null)); hi_peri_pindata(11, 0x02c, LVL1_0, 11, hi_func_name(gpio), LVL2_0, 11, hi_func_name(rgmii0), /* RGMII_RX1 */ LVL3_0, 11, hi_func_name(nni_link_led0), /* LED_NNI_GE_LINK0 */ LVL4_0, 11, hi_func_name(usb1), /* USB1_PWREN */ LVL5_0, 11, hi_func_name(null)); hi_peri_pindata(12, 0x030, LVL1_0, 12, hi_func_name(gpio), LVL2_0, 12, hi_func_name(rgmii0), /* RGMII_RX2 */ LVL3_0, 12, hi_func_name(wifi), /* WIFI0_CLK_REQ_N */ LVL4_0, 12, hi_func_name(null), /* UNI LED_ETH0_LINK0 */ LVL5_0, 12, hi_func_name(null)); hi_peri_pindata(13, 0x034, LVL1_0, 13, hi_func_name(gpio), LVL2_0, 13, hi_func_name(rgmii0), /* RGMII_RX3 */ LVL3_0, 13, hi_func_name(wifi), /* WIFI1_CLK_REQ_N */ LVL4_0, 13, hi_func_name(null), /* UNI LED_ETH0_LINK0 */ LVL5_0, 13, hi_func_name(null)); hi_peri_pindata(14, 0x038, LVL1_0, 14, hi_func_name(gpio), LVL2_0, 14, hi_func_name(uart1), /* UART1_SIN */ LVL3_0, 14, hi_func_name(null), LVL4_0, 14, hi_func_name(null), /* UNI LED_ETH0_LINK0 */ LVL5_0, 14, hi_func_name(null)); hi_peri_pindata(15, 0x03c, LVL1_0, 15, hi_func_name(gpio), LVL2_0, 15, hi_func_name(uart1), /* UART1_SOUT */ LVL3_0, 15, hi_func_name(null), LVL4_0, 15, hi_func_name(null), /* RGMII_TX3 */ LVL5_0, 15, hi_func_name(null)); hi_peri_pindata(16, 0x040, LVL1_0, 16, hi_func_name(gpio), LVL2_0, 16, hi_func_name(i2c0), /* I2C0_M_SCL */ LVL3_0, 16, hi_func_name(null), LVL4_0, 16, hi_func_name(null), LVL5_0, 16, hi_func_name(null)); hi_peri_pindata(17, 0x044, LVL1_0, 17, hi_func_name(gpio), LVL2_0, 17, hi_func_name(i2c0), /* I2C0_M_SDA */ LVL3_0, 17, hi_func_name(null), LVL4_0, 17, hi_func_name(null), LVL5_0, 17, hi_func_name(null)); hi_peri_pindata(18, 0x048, LVL1_0, 18, hi_func_name(pon_tx_en_off), LVL2_0, 18, hi_func_name(pon_tx_en), /* TX_EN */ LVL3_0, 18, hi_func_name(null), LVL4_0, 18, hi_func_name(null), LVL5_0, 18, hi_func_name(null)); hi_peri_pindata(19, 0x04c, LVL1_0, 19, hi_func_name(gpio), LVL2_0, 19, hi_func_name(pon_tx_dis), /* TX_EN_INV */ LVL3_0, 19, hi_func_name(null), LVL4_0, 19, hi_func_name(null), LVL5_0, 19, hi_func_name(null)); hi_peri_pindata(20, 0x050, LVL1_0, 20, hi_func_name(gpio), LVL2_0, 20, hi_func_name(pon), /* OTDR_TRIGGER */ LVL3_0, 20, hi_func_name(null), LVL4_0, 20, hi_func_name(null), LVL5_0, 20, hi_func_name(null)); hi_peri_pindata(21, 0x054, LVL1_0, 21, hi_func_name(gpio), LVL2_0, 21, hi_func_name(pon_sd), /* RX_LOS */ LVL3_0, 21, hi_func_name(null), LVL4_0, 21, hi_func_name(null), LVL5_0, 21, hi_func_name(null)); hi_peri_pindata(22, 0x058, LVL1_0, 22, hi_func_name(gpio), LVL2_0, 22, hi_func_name(pon_sd), /* TX_SD */ LVL3_0, 22, hi_func_name(null), LVL4_0, 22, hi_func_name(null), /* i2c1_m_scl */ LVL5_0, 22, hi_func_name(null)); hi_peri_pindata(23, 0x05c, LVL1_0, 23, hi_func_name(jtag_gpio23), LVL2_0, 23, hi_func_name(null), /* null */ LVL3_0, 23, hi_func_name(null), LVL4_0, 23, hi_func_name(null), /* i2c1_m_sda */ LVL5_0, 23, hi_func_name(null)); hi_peri_pindata(24, 0x060, LVL1_0, 24, hi_func_name(jtag_gpio24), LVL2_0, 24, hi_func_name(uart0), /* UART0_SIN */ LVL3_0, 24, hi_func_name(null), LVL4_0, 24, hi_func_name(mdio_debug), /* DEBUG_GEPHY_MDIO */ LVL5_0, 24, hi_func_name(null)); hi_peri_pindata(25, 0x064, LVL1_0, 25, hi_func_name(jtag_gpio25), LVL2_0, 25, hi_func_name(uart0), /* UART0_SOUT */ LVL3_0, 25, hi_func_name(null), LVL4_0, 25, hi_func_name(mdio_debug), /* DEBUG_GEPHY_MDC */ LVL5_0, 25, hi_func_name(null)); hi_peri_pindata(26, 0x068, LVL1_0, 26, hi_func_name(jtag_gpio26), LVL2_0, 26, hi_func_name(uart0), /* UART0_RTS */ LVL3_0, 26, hi_func_name(null), LVL4_0, 26, hi_func_name(nni_act_led1), /* LED_NNI_GE_ACT1 */ LVL5_0, 26, hi_func_name(null)); hi_peri_pindata(27, 0x06c, LVL1_0, 27, hi_func_name(jtag_gpio27), LVL2_0, 27, hi_func_name(uart0), /* UART0_CTS */ LVL3_0, 27, hi_func_name(spi1), /* SPI1_CS1 */ LVL4_0, 27, hi_func_name(nni_link_led1), /* LED_NNI_GE_LINK1 */ LVL5_0, 27, hi_func_name(null)); hi_peri_pindata(28, 0x070, LVL1_0, 28, hi_func_name(gpio), LVL2_0, 28, hi_func_name(nfc), /* nand_flash NFC_IO0 */ LVL3_0, 28, hi_func_name(spi1), /* SPI1_CS0 */ LVL4_0, 28, hi_func_name(null), LVL5_0, 28, hi_func_name(null)); hi_peri_pindata(29, 0x074, LVL1_0, 29, hi_func_name(gpio), LVL2_0, 29, hi_func_name(nfc), /* nand_flash NFC_IO1 */ LVL3_0, 29, hi_func_name(spi1), /* SPI1_RXD */ LVL4_0, 29, hi_func_name(null), LVL5_0, 29, hi_func_name(null)); hi_peri_pindata(30, 0x078, LVL1_0, 30, hi_func_name(gpio), LVL2_0, 30, hi_func_name(nfc), /* nand_flash NFC_IO2 */ LVL3_0, 30, hi_func_name(spi1), /* SPI1_TXD */ LVL4_0, 30, hi_func_name(null), LVL5_0, 30, hi_func_name(null)); hi_peri_pindata(31, 0x07c, LVL1_0, 31, hi_func_name(gpio), LVL2_0, 31, hi_func_name(nfc), /* nand_flash NFC_IO3 */ LVL3_0, 31, hi_func_name(spi1), /* SPI1_CLK */ LVL4_0, 31, hi_func_name(null), LVL5_0, 31, hi_func_name(null)); hi_peri_pindata(32, 0x080, LVL1_1, 0, hi_func_name(gpio), LVL2_1, 0, hi_func_name(nfc), /* nand_flash NFC_IO4 */ LVL3_1, 0, hi_func_name(pcm1), /* PCM1_CLK */ LVL4_1, 0, hi_func_name(null), /* hw_dout1 */ LVL5_1, 0, hi_func_name(null)); hi_peri_pindata(33, 0x084, LVL1_1, 1, hi_func_name(gpio), LVL2_1, 1, hi_func_name(nfc), /* nand_flash NFC_IO5 */ LVL3_1, 1, hi_func_name(pcm1), /* PCM1_DIN */ LVL4_1, 1, hi_func_name(null), LVL5_1, 1, hi_func_name(null)); hi_peri_pindata(34, 0x088, LVL1_1, 2, hi_func_name(gpio), LVL2_1, 2, hi_func_name(nfc), /* nand_flash NFC_IO6 */ LVL3_1, 2, hi_func_name(pcm1), /* PCM1_DOUT */ LVL4_1, 2, hi_func_name(null), LVL5_1, 2, hi_func_name(null)); hi_peri_pindata(35, 0x08c, LVL1_1, 3, hi_func_name(gpio), LVL2_1, 3, hi_func_name(nfc), /* nand_flash NFC_IO7 */ LVL3_1, 3, hi_func_name(pcm1), /* PCM1_SYNC */ LVL4_1, 3, hi_func_name(null), LVL5_1, 3, hi_func_name(null)); hi_peri_pindata(36, 0x090, LVL1_1, 4, hi_func_name(gpio), LVL2_1, 4, hi_func_name(nfc), /* nand_flash NFC_R_BN */ LVL3_1, 4, hi_func_name(sfc), /* SFC_CS0 */ LVL4_1, 4, hi_func_name(null), LVL5_1, 4, hi_func_name(null)); hi_peri_pindata(37, 0x094, LVL1_1, 5, hi_func_name(gpio), LVL2_1, 5, hi_func_name(nfc), /* nand_flash NFC_REN */ LVL3_1, 5, hi_func_name(sfc), /* SFC_RXD */ LVL4_1, 5, hi_func_name(null), LVL5_1, 5, hi_func_name(null)); hi_peri_pindata(38, 0x098, LVL1_1, 6, hi_func_name(gpio), LVL2_1, 6, hi_func_name(nfc), /* nand_flash NFC_CEN */ LVL3_1, 6, hi_func_name(sfc), /* SFC_CS_1 */ LVL4_1, 6, hi_func_name(null), LVL5_1, 6, hi_func_name(null)); hi_peri_pindata(39, 0x09c, LVL1_1, 7, hi_func_name(gpio), LVL2_1, 7, hi_func_name(nfc), /* nand_flash NFC_CLE */ LVL3_1, 7, hi_func_name(sfc), /* SFC_TXD */ LVL4_1, 7, hi_func_name(null), LVL5_1, 7, hi_func_name(null)); hi_peri_pindata(40, 0x0A0, LVL1_1, 8, hi_func_name(gpio), LVL2_1, 8, hi_func_name(nfc), /* nand_flash NFC_ALE */ LVL3_1, 8, hi_func_name(sfc), /* SFC_CLK */ LVL4_1, 8, hi_func_name(null), LVL5_1, 8, hi_func_name(null)); hi_peri_pindata(41, 0x0A4, LVL1_1, 9, hi_func_name(gpio), LVL2_1, 9, hi_func_name(nfc), /* nand_flash NFC_WEN */ LVL3_1, 9, hi_func_name(sfc), /* SFC_HOLD */ LVL4_1, 9, hi_func_name(null), LVL5_1, 9, hi_func_name(null)); hi_peri_pindata(42, 0x0A8, LVL1_1, 10, hi_func_name(gpio), LVL2_1, 10, hi_func_name(nfc), /* nand_flash NFC_WPN */ LVL3_1, 10, hi_func_name(sfc), /* SFC_WP */ LVL4_1, 10, hi_func_name(null), LVL5_1, 10, hi_func_name(null)); hi_peri_pindata(43, 0x0AC, LVL1_1, 11, hi_func_name(gpio), LVL2_1, 11, hi_func_name(sd), /* SD_CLK */ LVL3_1, 11, hi_func_name(pcm0), /* PCM0_CLK */ LVL4_1, 11, hi_func_name(null), LVL5_1, 11, hi_func_name(null)); hi_peri_pindata(44, 0x0B0, LVL1_1, 12, hi_func_name(gpio), LVL2_1, 12, hi_func_name(sd), /* SD_CMD */ LVL3_1, 12, hi_func_name(pcm0), /* PCM0_DIN */ LVL4_1, 12, hi_func_name(null), LVL5_1, 12, hi_func_name(null)); hi_peri_pindata(45, 0x0B4, LVL1_1, 13, hi_func_name(gpio), LVL2_1, 13, hi_func_name(sd), /* SD_DATA0 */ LVL3_1, 13, hi_func_name(pcm0), /* PCM0_DOUT */ LVL4_1, 13, hi_func_name(null), LVL5_1, 13, hi_func_name(null)); hi_peri_pindata(46, 0x0B8, LVL1_1, 14, hi_func_name(gpio), LVL2_1, 14, hi_func_name(sd), /* SD_DATA1 */ LVL3_1, 14, hi_func_name(pcm0), /* PCM0_SYNC */ LVL4_1, 14, hi_func_name(null), LVL5_1, 14, hi_func_name(null)); hi_peri_pindata(47, 0x0BC, LVL1_1, 15, hi_func_name(gpio), LVL2_1, 15, hi_func_name(sd), /* SD_DATA2 */ LVL3_1, 15, hi_func_name(spi0), /* SPI0_CS1 */ LVL4_1, 15, hi_func_name(null), LVL5_1, 15, hi_func_name(usb0)); /* USB0_OVRCUR */ hi_peri_pindata(48, 0x0C0, LVL1_1, 16, hi_func_name(gpio), LVL2_1, 16, hi_func_name(sd), /* SD_DATA3 */ LVL3_1, 16, hi_func_name(spi0), /* SPI0_CS0 */ LVL4_1, 16, hi_func_name(null), LVL5_1, 16, hi_func_name(usb0)); /* USB0_PWREN */ hi_peri_pindata(49, 0x0C4, LVL1_1, 17, hi_func_name(gpio), LVL2_1, 17, hi_func_name(sd), /* SD_PWREN */ LVL3_1, 17, hi_func_name(spi0), /* SPI0_RXD */ LVL4_1, 17, hi_func_name(mdio1), /* gephy_mdio_sel */ LVL5_1, 17, hi_func_name(null)); hi_peri_pindata(50, 0x0C8, LVL1_1, 18, hi_func_name(gpio), LVL2_1, 18, hi_func_name(sd), /* SD_PRSNT_N */ LVL3_1, 18, hi_func_name(spi0), /* SPI0_TXD */ LVL4_1, 18, hi_func_name(mdio1), /* gephy_mdio_sel */ LVL5_1, 18, hi_func_name(null)); hi_peri_pindata(51, 0x0CC, LVL1_1, 19, hi_func_name(gpio), LVL2_1, 19, hi_func_name(sd), /* SD_WR_PRT */ LVL3_1, 19, hi_func_name(spi0), /* SPI0_CLK */ LVL4_1, 19, hi_func_name(null), LVL5_1, 19, hi_func_name(null)); /* groups */ hi_pinctrl_groups(pwm); hi_pinctrl_groups(rgmii0); hi_pinctrl_groups(eth_act_led0); hi_pinctrl_groups(eth_act_led1); hi_pinctrl_groups(eth_act_led2); hi_pinctrl_groups(eth_act_led3); hi_pinctrl_groups(eth_link_led0); hi_pinctrl_groups(eth_link_led1); hi_pinctrl_groups(eth_link_led2); hi_pinctrl_groups(eth_link_led3); hi_pinctrl_groups(phy_clk); hi_pinctrl_groups(clk_test); hi_pinctrl_groups(usb1); hi_pinctrl_groups(wifi); hi_pinctrl_groups(uart1); hi_pinctrl_groups(pon_sd); hi_pinctrl_groups(i2c0); hi_pinctrl_groups(pon_tx_dis); hi_pinctrl_groups(pon_tx_en); hi_pinctrl_groups(pon_tx_en_off); hi_pinctrl_groups(uart0); hi_pinctrl_groups(mdio_debug); hi_pinctrl_groups(nni_act_led0); hi_pinctrl_groups(nni_act_led1); hi_pinctrl_groups(nni_link_led0); hi_pinctrl_groups(nni_link_led1); hi_pinctrl_groups(spi1); hi_pinctrl_groups(nfc); hi_pinctrl_groups(pcm1); hi_pinctrl_groups(sfc); hi_pinctrl_groups(sd); hi_pinctrl_groups(pcm0); hi_pinctrl_groups(spi0); hi_pinctrl_groups(usb0); hi_pinctrl_groups(mdio1); hi_pinctrl_groups(jtag_gpio23); hi_pinctrl_groups(jtag_gpio24); hi_pinctrl_groups(jtag_gpio25); hi_pinctrl_groups(jtag_gpio26); hi_pinctrl_groups(jtag_gpio27); /* pwm */ static const uint32_t pwm_pins[] = {0, 1}; /* rgmii */ static const uint32_t rgmii0_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}; /* uni_led0 */ static const uint32_t eth_act_led0_pins[] = {2}; static const uint32_t eth_act_led1_pins[] = {3}; static const uint32_t eth_act_led2_pins[] = {4}; static const uint32_t eth_act_led3_pins[] = {5}; static const uint32_t eth_link_led0_pins[] = {6}; static const uint32_t eth_link_led1_pins[] = {7}; static const uint32_t eth_link_led2_pins[] = {8}; static const uint32_t eth_link_led3_pins[] = {9}; /* phy_clk */ static const uint32_t phy_clk_pins[] = {2}; /* clk_test */ static const uint32_t clk_test_pins[] = {5}; /* nni_led0 */ static const uint32_t nni_act_led0_pins[] = {10}; static const uint32_t nni_act_led1_pins[] = {26}; static const uint32_t nni_link_led0_pins[] = {11}; static const uint32_t nni_link_led1_pins[] = {27}; /* usb1 */ static const uint32_t usb1_pins[] = {10, 11}; /* wifi */ static const uint32_t wifi_pins[] = {12, 13}; /* uart1 */ static const uint32_t uart1_pins[] = {14, 15}; /* i2c0 */ static const uint32_t i2c0_pins[] = {16, 17}; /* pon_sd */ static const uint32_t pon_sd_pins[] = {21, 22}; /* pon_tx_dis */ static const uint32_t pon_tx_dis_pins[] = {19}; /* pon_tx_en */ static const uint32_t pon_tx_en_pins[] = {18}; /* pon_tx_en_off */ static const uint32_t pon_tx_en_off_pins[] = {18}; /* uart0 */ static const uint32_t uart0_pins[] = {24, 25, 26, 27}; /* mdio_debug */ static const uint32_t mdio_debug_pins[] = {24, 25}; /* spi1 */ static const uint32_t spi1_pins[] = {27, 28, 29, 30, 31}; /* nfc */ static const uint32_t nfc_pins[] = {28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42}; /* pcm1 */ static const uint32_t pcm1_pins[] = {32, 33, 34, 35}; /* sfc */ static const uint32_t sfc_pins[] = {36, 37, 38, 39, 40, 41, 42}; /* sd */ static const uint32_t sd_pins[] = {43, 44, 45, 46, 47, 48, 49, 50, 51}; /* pcm0 */ static const uint32_t pcm0_pins[] = {43, 44, 45, 46}; /* spi0 */ static const uint32_t spi0_pins[] = {47, 48, 49, 50, 51}; /* usb0 */ static const uint32_t usb0_pins[] = {47, 48}; /* mdio1 */ static const uint32_t mdio1_pins[] = {49, 50}; static const uint32_t jtag_gpio23_pins[] = {23}; static const uint32_t jtag_gpio24_pins[] = {24}; static const uint32_t jtag_gpio25_pins[] = {25}; static const uint32_t jtag_gpio26_pins[] = {26}; static const uint32_t jtag_gpio27_pins[] = {27}; static struct pinctrl_pin_desc g_peri_pins[] = { hi_pin(0), hi_pin(1), hi_pin(2), hi_pin(3), hi_pin(4), hi_pin(5), hi_pin(6), hi_pin(7), hi_pin(8), hi_pin(9), hi_pin(10), hi_pin(11), hi_pin(12), hi_pin(13), hi_pin(14), hi_pin(15), hi_pin(16), hi_pin(17), hi_pin(18), hi_pin(19), hi_pin(20), hi_pin(21), hi_pin(22), hi_pin(23), hi_pin(24), hi_pin(25), hi_pin(26), hi_pin(27), hi_pin(28), hi_pin(29), hi_pin(30), hi_pin(31), hi_pin(32), hi_pin(33), hi_pin(34), hi_pin(35), hi_pin(36), hi_pin(37), hi_pin(38), hi_pin(39), hi_pin(40), hi_pin(41), hi_pin(42), hi_pin(43), hi_pin(44), hi_pin(45), hi_pin(46), hi_pin(47), hi_pin(48), hi_pin(49), hi_pin(50), hi_pin(51), }; static const struct hi_pmux_func g_peri_functions[] = { hi_pinctrl_pmux_func(pwm), hi_pinctrl_pmux_func(rgmii0), hi_pinctrl_pmux_func(eth_act_led0), hi_pinctrl_pmux_func(eth_act_led1), hi_pinctrl_pmux_func(eth_act_led2), hi_pinctrl_pmux_func(eth_act_led3), hi_pinctrl_pmux_func(eth_link_led0), hi_pinctrl_pmux_func(eth_link_led1), hi_pinctrl_pmux_func(eth_link_led2), hi_pinctrl_pmux_func(eth_link_led3), hi_pinctrl_pmux_func(phy_clk), hi_pinctrl_pmux_func(clk_test), hi_pinctrl_pmux_func(nni_act_led0), hi_pinctrl_pmux_func(nni_act_led1), hi_pinctrl_pmux_func(nni_link_led0), hi_pinctrl_pmux_func(nni_link_led1), hi_pinctrl_pmux_func(usb1), hi_pinctrl_pmux_func(wifi), hi_pinctrl_pmux_func(uart1), hi_pinctrl_pmux_func(i2c0), hi_pinctrl_pmux_func(pon_sd), hi_pinctrl_pmux_func(pon_tx_dis), hi_pinctrl_pmux_func(pon_tx_en), hi_pinctrl_pmux_func(pon_tx_en_off), hi_pinctrl_pmux_func(uart0), hi_pinctrl_pmux_func(mdio_debug), hi_pinctrl_pmux_func(spi1), hi_pinctrl_pmux_func(nfc), hi_pinctrl_pmux_func(pcm1), hi_pinctrl_pmux_func(sfc), hi_pinctrl_pmux_func(sd), hi_pinctrl_pmux_func(pcm0), hi_pinctrl_pmux_func(spi0), hi_pinctrl_pmux_func(usb0), hi_pinctrl_pmux_func(mdio1), hi_pinctrl_pmux_func(jtag_gpio23), hi_pinctrl_pmux_func(jtag_gpio24), hi_pinctrl_pmux_func(jtag_gpio25), hi_pinctrl_pmux_func(jtag_gpio26), hi_pinctrl_pmux_func(jtag_gpio27), }; static struct hi_pin_group g_peri_groups[] = { hi_pinctrl_pin_group(pwm), hi_pinctrl_pin_group(rgmii0), hi_pinctrl_pin_group(eth_act_led0), hi_pinctrl_pin_group(eth_act_led1), hi_pinctrl_pin_group(eth_act_led2), hi_pinctrl_pin_group(eth_act_led3), hi_pinctrl_pin_group(eth_link_led0), hi_pinctrl_pin_group(eth_link_led1), hi_pinctrl_pin_group(eth_link_led2), hi_pinctrl_pin_group(eth_link_led3), hi_pinctrl_pin_group(phy_clk), hi_pinctrl_pin_group(clk_test), hi_pinctrl_pin_group(nni_act_led0), hi_pinctrl_pin_group(nni_act_led1), hi_pinctrl_pin_group(nni_link_led0), hi_pinctrl_pin_group(nni_link_led1), hi_pinctrl_pin_group(usb1), hi_pinctrl_pin_group(wifi), hi_pinctrl_pin_group(uart1), hi_pinctrl_pin_group(pon_sd), hi_pinctrl_pin_group(i2c0), hi_pinctrl_pin_group(pon_tx_dis), hi_pinctrl_pin_group(pon_tx_en), hi_pinctrl_pin_group(pon_tx_en_off), hi_pinctrl_pin_group(uart0), hi_pinctrl_pin_group(mdio_debug), hi_pinctrl_pin_group(spi1), hi_pinctrl_pin_group(nfc), hi_pinctrl_pin_group(pcm1), hi_pinctrl_pin_group(sfc), hi_pinctrl_pin_group(sd), hi_pinctrl_pin_group(pcm0), hi_pinctrl_pin_group(spi0), hi_pinctrl_pin_group(usb0), hi_pinctrl_pin_group(mdio1), hi_pinctrl_pin_group_with_sig_sel(jtag_gpio23, 0x10, 1, 2), hi_pinctrl_pin_group_with_sig_sel(jtag_gpio24, 0x10, 1, 2), hi_pinctrl_pin_group_with_sig_sel(jtag_gpio25, 0x10, 1, 2), hi_pinctrl_pin_group_with_sig_sel(jtag_gpio26, 0x10, 1, 2), hi_pinctrl_pin_group_with_sig_sel(jtag_gpio27, 0x10, 1, 2), }; static int32_t emei_pin_config_get(struct hi_pinctrl_drvdata *data, struct hi_pin_drvdata *pin_data, uintptr_t *config) { enum pin_config_param param = pinconf_to_config_param(*config); union hi_pin_cfg_reg_emei pin_cfg; uint16_t arg; pin_cfg.value = readl(data->virt_conf_base + pin_data->cfg_offset); switch (param) { case PIN_CONFIG_BIAS_PULL_DOWN: arg = pin_cfg.bits.pd; break; case PIN_CONFIG_BIAS_PULL_UP: arg = pin_cfg.bits.pu; break; case PIN_CONFIG_DRIVE_STRENGTH: arg = pin_cfg.bits.ds; break; case PIN_CONFIG_INPUT_ENABLE: arg = pin_cfg.bits.ien; break; case PIN_CONFIG_INPUT_SCHMITT_ENABLE: arg = pin_cfg.bits.sten; break; case PIN_CONFIG_OUTPUT: arg = pin_cfg.bits.out; break; default: return -EINVAL; } *config = pinconf_to_config_packed(param, arg); return 0; } static int emei_pin_config_set(struct hi_pinctrl_drvdata *data, struct hi_pin_drvdata *pin_data, uintptr_t *configs, uint32_t num_configs) { union hi_pin_cfg_reg_emei pin_cfg; enum pin_config_param param; uint32_t idx; uint16_t arg; for (idx = 0; idx < num_configs; idx++) { param = pinconf_to_config_param(configs[idx]); arg = pinconf_to_config_argument(configs[idx]); pin_cfg.value = readl(data->virt_conf_base + pin_data->cfg_offset); switch (param) { case PIN_CONFIG_BIAS_PULL_DOWN: pin_cfg.bits.pd = arg; break; case PIN_CONFIG_BIAS_PULL_UP: pin_cfg.bits.pu = arg; break; case PIN_CONFIG_DRIVE_STRENGTH: pin_cfg.bits.ds = arg; break; case PIN_CONFIG_INPUT_ENABLE: pin_cfg.bits.ien = arg; break; case PIN_CONFIG_INPUT_SCHMITT_ENABLE: pin_cfg.bits.sten = arg; break; case PIN_CONFIG_OUTPUT: pin_cfg.bits.out = arg; break; default: return -EINVAL; } writel(pin_cfg.value, data->virt_conf_base + pin_data->cfg_offset); } return 0; } const struct hi_pinctrl_soc_data g_emei_peri_pinctrl_soc_data = { .name = "emei-peripinctrl", .pins = g_peri_pins, .npins = ARRAY_SIZE(g_peri_pins), .groups = g_peri_groups, .ngroup = ARRAY_SIZE(g_peri_groups), .funcs = g_peri_functions, .nfunc = ARRAY_SIZE(g_peri_functions), .pin_config_set = emei_pin_config_set, .pin_config_get = emei_pin_config_get, }; static const struct of_device_id g_emei_pinctrl_match[] = { { .compatible = "hsan,emei-peri-pinctrl", .data = &g_emei_peri_pinctrl_soc_data, }, {} }; MODULE_DEVICE_TABLE(of, g_emei_pinctrl_match); static int32_t emei_pinctrl_probe(struct platform_device *pdev) { const struct of_device_id *match = of_match_device(g_emei_pinctrl_match, &pdev->dev); const struct hi_pinctrl_soc_data *soc_data = NULL; if (match != NULL && match->data != NULL) soc_data = match->data; return hi_pinctrl_probe(pdev, soc_data); } static SIMPLE_DEV_PM_OPS(pinctrl_hi_pm_ops, hi_pinctrl_suspend, hi_pinctrl_resume); static struct platform_driver g_emei_pinctrl_driver = { .probe = emei_pinctrl_probe, .remove = hi_pinctrl_remove, .driver = { .name = "emei-pinctrl", .of_match_table = g_emei_pinctrl_match, .pm = &pinctrl_hi_pm_ops, }, }; module_platform_driver(g_emei_pinctrl_driver); MODULE_AUTHOR("hsan"); MODULE_DESCRIPTION("hsan pinctrl driver"); MODULE_LICENSE("GPL"); 以上代码,有没有 HGPIO31 led gpio dgpio13,这俩引脚的寄存器配置啊?
07-24
/* * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2022-2022. All rights reserved. * Description: hsan pinctrl driver. * Author : hsan * Create : 2022-10-18 * History: Init. */ #include <linux/io.h> #include <linux/module.h> #include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinconf-generic.h> #include "hi_types.h" #include "hi_pinctrl.h" #define IOSEL0 0x00 #define IOSEL1 0x04 #define JTAG_SEL 0x08 #define LVL1_SEL_L 0x0c #define LVL1_SEL_H 0x10 #define NULL_BIT 0x01 union hi_pin_cfg_reg_luofu { uint32_t value; struct { uint32_t pu : 1; /* pull up */ uint32_t pd : 1; /* pull down */ uint32_t ds : 3; /* drive strength */ uint32_t sten : 1; /* slow rate enable */ uint32_t pocfgb : 1; /* power on configuration bit */ uint32_t ien : 1; /* reserved */ uint32_t in : 1; /* input value */ uint32_t oen : 1; /* output enable */ uint32_t out : 1; /* output value */ uint32_t rsv0 : 21; } bits; }; hi_peri_pindata(0, 0x000, IOSEL0, 0, hi_func_name(gpio), LVL1_SEL_H, 7, hi_func_name(led0), /* LED1 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(1, 0x004, IOSEL0, 1, hi_func_name(gpio), LVL1_SEL_H, 6, hi_func_name(led0), /* LED0 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(2, 0x008, IOSEL0, 2, hi_func_name(jtag_gpio2), LVL1_SEL_H, 8, hi_func_name(eth_act_led0), /* ETH_ACK0 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(3, 0x00c, IOSEL0, 3, hi_func_name(jtag_gpio3), LVL1_SEL_H, 9, hi_func_name(eth_act_led1), /* ETH_ACK1 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(4, 0x010, IOSEL0, 4, hi_func_name(jtag_gpio4), LVL1_SEL_H, 10, hi_func_name(eth_act_led2), /* ETH_ACK2 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(5, 0x014, IOSEL0, 5, hi_func_name(jtag_gpio5), LVL1_SEL_H, 11, hi_func_name(eth_act_led3), /* ETH_ACK3 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(6, 0x018, LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(7, 0x01c, IOSEL0, 7, hi_func_name(gpio), LVL1_SEL_H, 12, hi_func_name(eth_act_led4), /* ETH_ACK4 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(8, 0x020, IOSEL0, 8, hi_func_name(gpio), LVL1_SEL_L, 0, hi_func_name(avs), /* CPU_VG */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(9, 0x024, IOSEL0, 9, hi_func_name(gpio), LVL1_SEL_L, 24, hi_func_name(phy_clk), /* PHY_REF_CLK */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(10, 0x028, IOSEL0, 10, hi_func_name(gpio), LVL1_SEL_H, 21, hi_func_name(mdio1), /* MDC1 MDIO CLK */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(11, 0x02c, IOSEL0, 11, hi_func_name(gpio), LVL1_SEL_H, 21, hi_func_name(mdio1), /* MDIO DATA */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(12, 0x030, IOSEL0, 12, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_TDATA3 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(13, 0x034, IOSEL0, 13, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_TDATA2 */ LVL1_SEL_L, 23, hi_func_name(spi), /* SPI_RXD */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(14, 0x038, IOSEL0, 14, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_TDATA1 */ LVL1_SEL_L, 23, hi_func_name(spi), /* SPI_TXD */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(15, 0x03c, IOSEL0, 15, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_TDATA0 */ LVL1_SEL_L, 23, hi_func_name(spi), /* SPI_CLK */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(16, 0x040, IOSEL0, 16, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_TXCLK */ LVL1_SEL_L, 9, hi_func_name(uart0), /* UART0_SIN */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(17, 0x044, IOSEL0, 17, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_TXEN */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(18, 0x048, IOSEL0, 18, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_RXCLK */ LVL1_SEL_L, 10, hi_func_name(uart0), /* UART0_CTS_N */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(19, 0x04c, IOSEL0, 19, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_RXDV */ LVL1_SEL_L, 10, hi_func_name(uart0), /* UART0_RTS_N */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(20, 0x050, IOSEL0, 20, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_RDATA0 */ LVL1_SEL_H, 14, hi_func_name(led1), /* LED1_1 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(21, 0x054, IOSEL0, 21, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_RDATA1 */ LVL1_SEL_H, 13, hi_func_name(led1), /* LED0_0 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(22, 0x058, IOSEL0, 22, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_RDATA2 */ LVL1_SEL_L, 9, hi_func_name(uart0), /* UART0_SOUT */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(23, 0x05c, IOSEL0, 23, hi_func_name(gpio), LVL1_SEL_L, 11, hi_func_name(rgmii0), /* RGMII_RDATA3 */ LVL1_SEL_L, 22, hi_func_name(spi), /* SPI_CS0 */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(24, 0x060, IOSEL0, 24, hi_func_name(gpio), LVL1_SEL_L, 15, hi_func_name(i2c), /* I2C_M_SCL */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(25, 0x064, IOSEL0, 25, hi_func_name(gpio), LVL1_SEL_L, 15, hi_func_name(i2c), /* I2C2_M_SDA */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(26, 0x068, IOSEL0, 26, hi_func_name(gpio), LVL1_SEL_L, 14, hi_func_name(clk_test), /* TEST_CLK */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(27, 0x06c, IOSEL0, 27, hi_func_name(gpio), LVL1_SEL_H, 17, hi_func_name(usb), /* USB_PWREN */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(28, 0x070, IOSEL0, 28, hi_func_name(gpio), LVL1_SEL_H, 16, hi_func_name(usb), /* USB_OVRCUR */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(29, 0x074, LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(30, 0x078, IOSEL0, 30, hi_func_name(gpio), LVL1_SEL_L, 2, hi_func_name(sfc), /* SFC_WP */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(31, 0x07c, LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(32, 0x080, LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(33, 0x084, IOSEL0, 1, hi_func_name(gpio), LVL1_SEL_L, 3, hi_func_name(sfc), /* DFC_HOLD */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(34, 0x088, LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(35, 0x08c, IOSEL0, 3, hi_func_name(gpio), LVL1_SEL_L, 7, hi_func_name(uart1), /* UART1_SIN */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); hi_peri_pindata(36, 0x090, IOSEL1, 3, hi_func_name(gpio), LVL1_SEL_L, 7, hi_func_name(uart1), /* UART1_SIN */ LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null), LVL1_SEL_L, NULL_BIT, hi_func_name(null)); /* group */ hi_pinctrl_groups(sfc); hi_pinctrl_groups(uart1); hi_pinctrl_groups(uart0); hi_pinctrl_groups(mdio1); hi_pinctrl_groups(spi); hi_pinctrl_groups(i2c); hi_pinctrl_groups(rgmii0); hi_pinctrl_groups(eth_act_led0); hi_pinctrl_groups(eth_act_led1); hi_pinctrl_groups(eth_act_led2); hi_pinctrl_groups(eth_act_led3); hi_pinctrl_groups(eth_act_led4); hi_pinctrl_groups(led0); hi_pinctrl_groups(led1); hi_pinctrl_groups(clk_test); hi_pinctrl_groups(avs); hi_pinctrl_groups(phy_clk); hi_pinctrl_groups(usb); hi_pinctrl_groups(jtag_gpio2); hi_pinctrl_groups(jtag_gpio3); hi_pinctrl_groups(jtag_gpio4); hi_pinctrl_groups(jtag_gpio5); /* sfc */ static const uint32_t sfc_pins[] = {30, 33}; /* uart1 */ static const uint32_t uart1_pins[] = {35, 36}; /* uart0 */ static const uint32_t uart0_pins[] = {16, 18, 19, 22}; /* mdio */ static const uint32_t mdio1_pins[] = {10, 11}; /* spi */ static const uint32_t spi_pins[] = {13, 14, 15, 23}; /* i2c */ static const uint32_t i2c_pins[] = {24, 25}; /* rgmii */ static const uint32_t rgmii0_pins[] = {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23}; /* eth led */ static const uint32_t eth_act_led0_pins[] = {2}; static const uint32_t eth_act_led1_pins[] = {3}; static const uint32_t eth_act_led2_pins[] = {4}; static const uint32_t eth_act_led3_pins[] = {5}; static const uint32_t eth_act_led4_pins[] = {7}; /* led */ static const uint32_t led0_pins[] = {0, 1}; static const uint32_t led1_pins[] = {20, 21}; /* clk_test */ static const uint32_t clk_test_pins[] = {26}; /* avs */ static const uint32_t avs_pins[] = {8}; /* phy_clk */ static const uint32_t phy_clk_pins[] = {9}; /* usb */ static const uint32_t usb_pins[] = {27, 28}; /* jtag_gpio */ static const uint32_t jtag_gpio2_pins[] = {2}; static const uint32_t jtag_gpio3_pins[] = {3}; static const uint32_t jtag_gpio4_pins[] = {4}; static const uint32_t jtag_gpio5_pins[] = {5}; static struct pinctrl_pin_desc g_peri_pins[] = { hi_pin(0), hi_pin(1), hi_pin(2), hi_pin(3), hi_pin(4), hi_pin(5), hi_pin(6), hi_pin(7), hi_pin(8), hi_pin(9), hi_pin(10), hi_pin(11), hi_pin(12), hi_pin(13), hi_pin(14), hi_pin(15), hi_pin(16), hi_pin(17), hi_pin(18), hi_pin(19), hi_pin(20), hi_pin(21), hi_pin(22), hi_pin(23), hi_pin(24), hi_pin(25), hi_pin(26), hi_pin(27), hi_pin(28), hi_pin(29), hi_pin(30), hi_pin(31), hi_pin(32), hi_pin(33), hi_pin(34), hi_pin(35), hi_pin(36), }; static const struct hi_pmux_func g_peri_functions[] = { hi_pinctrl_pmux_func(sfc), hi_pinctrl_pmux_func(uart1), hi_pinctrl_pmux_func(uart0), hi_pinctrl_pmux_func(mdio1), hi_pinctrl_pmux_func(spi), hi_pinctrl_pmux_func(i2c), hi_pinctrl_pmux_func(rgmii0), hi_pinctrl_pmux_func(eth_act_led0), hi_pinctrl_pmux_func(eth_act_led1), hi_pinctrl_pmux_func(eth_act_led2), hi_pinctrl_pmux_func(eth_act_led3), hi_pinctrl_pmux_func(eth_act_led4), hi_pinctrl_pmux_func(led0), hi_pinctrl_pmux_func(led1), hi_pinctrl_pmux_func(clk_test), hi_pinctrl_pmux_func(avs), hi_pinctrl_pmux_func(phy_clk), hi_pinctrl_pmux_func(usb), hi_pinctrl_pmux_func(jtag_gpio2), hi_pinctrl_pmux_func(jtag_gpio3), hi_pinctrl_pmux_func(jtag_gpio4), hi_pinctrl_pmux_func(jtag_gpio5), }; static struct hi_pin_group g_peri_groups[] = { hi_pinctrl_pin_group(sfc), hi_pinctrl_pin_group(uart1), hi_pinctrl_pin_group(uart0), hi_pinctrl_pin_group(mdio1), hi_pinctrl_pin_group(spi), hi_pinctrl_pin_group(i2c), hi_pinctrl_pin_group(rgmii0), hi_pinctrl_pin_group(eth_act_led0), hi_pinctrl_pin_group(eth_act_led1), hi_pinctrl_pin_group(eth_act_led2), hi_pinctrl_pin_group(eth_act_led3), hi_pinctrl_pin_group(eth_act_led4), hi_pinctrl_pin_group(led0), hi_pinctrl_pin_group(led1), hi_pinctrl_pin_group(clk_test), hi_pinctrl_pin_group(avs), hi_pinctrl_pin_group(phy_clk), hi_pinctrl_pin_group(usb), hi_pinctrl_pin_group_with_sig_sel(jtag_gpio2, 0x08, 1, 1), hi_pinctrl_pin_group_with_sig_sel(jtag_gpio3, 0x08, 1, 1), hi_pinctrl_pin_group_with_sig_sel(jtag_gpio4, 0x08, 1, 1), hi_pinctrl_pin_group_with_sig_sel(jtag_gpio5, 0x08, 1, 1), }; static int32_t luofu_pin_config_get(struct hi_pinctrl_drvdata *data, struct hi_pin_drvdata *pin_data, uintptr_t *config) { enum pin_config_param param = pinconf_to_config_param(*config); union hi_pin_cfg_reg_luofu pin_cfg; uint16_t arg; pin_cfg.value = readl(data->virt_conf_base + pin_data->cfg_offset); switch (param) { case PIN_CONFIG_BIAS_PULL_DOWN: arg = pin_cfg.bits.pd; break; case PIN_CONFIG_BIAS_PULL_UP: arg = pin_cfg.bits.pu; break; case PIN_CONFIG_DRIVE_STRENGTH: arg = pin_cfg.bits.ds; break; case PIN_CONFIG_INPUT_ENABLE: arg = pin_cfg.bits.ien; break; case PIN_CONFIG_INPUT_SCHMITT_ENABLE: arg = pin_cfg.bits.sten; break; case PIN_CONFIG_OUTPUT: arg = pin_cfg.bits.out; break; default: return -EINVAL; } *config = pinconf_to_config_packed(param, arg); return 0; } static int luofu_pin_config_set(struct hi_pinctrl_drvdata *data, struct hi_pin_drvdata *pin_data, uintptr_t *configs, uint32_t num_configs) { union hi_pin_cfg_reg_luofu pin_cfg; enum pin_config_param param; uint32_t idx; uint16_t arg; for (idx = 0; idx < num_configs; idx++) { param = pinconf_to_config_param(configs[idx]); arg = pinconf_to_config_argument(configs[idx]); pin_cfg.value = readl(data->virt_conf_base + pin_data->cfg_offset); switch (param) { case PIN_CONFIG_BIAS_PULL_DOWN: pin_cfg.bits.pd = arg; break; case PIN_CONFIG_BIAS_PULL_UP: pin_cfg.bits.pu = arg; break; case PIN_CONFIG_DRIVE_STRENGTH: pin_cfg.bits.ds = arg; break; case PIN_CONFIG_INPUT_ENABLE: pin_cfg.bits.ien = arg; break; case PIN_CONFIG_INPUT_SCHMITT_ENABLE: pin_cfg.bits.sten = arg; break; case PIN_CONFIG_OUTPUT: pin_cfg.bits.out = arg; break; default: return -EINVAL; } writel(pin_cfg.value, data->virt_conf_base + pin_data->cfg_offset); } return 0; } const struct hi_pinctrl_soc_data g_luofu_peri_pinctrl_soc_data = { .name = "luofu-peripinctrl", .pins = g_peri_pins, .npins = ARRAY_SIZE(g_peri_pins), .groups = g_peri_groups, .ngroup = ARRAY_SIZE(g_peri_groups), .funcs = g_peri_functions, .nfunc = ARRAY_SIZE(g_peri_functions), .pin_config_set = luofu_pin_config_set, .pin_config_get = luofu_pin_config_get, }; static const struct of_device_id g_luofu_pinctrl_match[] = { { .compatible = "hsan,luofu-peri-pinctrl", .data = &g_luofu_peri_pinctrl_soc_data, }, {} }; MODULE_DEVICE_TABLE(of, g_luofu_pinctrl_match); static int32_t luofu_pinctrl_probe(struct platform_device *pdev) { const struct of_device_id *match = of_match_device(g_luofu_pinctrl_match, &pdev->dev); const struct hi_pinctrl_soc_data *soc_data = NULL; if (match != NULL && match->data != NULL) soc_data = match->data; return hi_pinctrl_probe(pdev, soc_data); } static SIMPLE_DEV_PM_OPS(pinctrl_hi_pm_ops, hi_pinctrl_suspend, hi_pinctrl_resume); static struct platform_driver g_luofu_pinctrl_driver = { .probe = luofu_pinctrl_probe, .remove = hi_pinctrl_remove, .driver = { .name = "luofu-pinctrl", .of_match_table = g_luofu_pinctrl_match, .pm = &pinctrl_hi_pm_ops, }, }; module_platform_driver(g_luofu_pinctrl_driver); MODULE_AUTHOR("hsan"); MODULE_DESCRIPTION("hsan pinctrl driver"); MODULE_LICENSE("GPL"); 告诉我代码的功能实现的什么?
07-24
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