system memory 之Static RAM (SRAM)

本文详细探讨了静态随机存取存储器(SRAM)与动态随机存取存储器(DRAM)之间的区别。SRAM无需外部刷新即可保持数据,在简单性和速度方面优于DRAM;然而,SRAM在成本和尺寸上处于劣势,这导致它主要应用于一级缓存和二级缓存中。

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Static RAM is a type of RAM that holds its data without external refresh, for as long as power is supplied to the circuit. This is contrasted to dynamic RAM (DRAM), which must be refreshed many times per second in order to hold its data contents. SRAMs are used for specific applications within the PC, where their strengths outweigh their weaknesses compared to DRAM:

  • Simplicity: SRAMs don't require external refresh circuitry or other work in order for them to keep their data intact.
  • Speed: SRAM is faster than DRAM.

In contrast, SRAMs have the following weaknesses, compared to DRAMs:

  • Cost: SRAM is, byte for byte, several times more expensive than DRAM.
  • Size: SRAMs take up much more space than DRAMs (which is part of why the cost is higher).

These advantages and disadvantages taken together obviously show that performance-wise, SRAM is superior to DRAM, and we would use it exclusively if only we could do so economically. Unfortunately, 32 MB of SRAM would be prohibitively large and costly, which is why DRAM is used for system memory. SRAMs are used instead for level 1 cache and level 2 cache memory, for which it is perfectly suited; cache memory needs to be very fast, and not very large.

SRAM is manufactured in a way rather similar to how processors are: highly-integrated transistor patterns photo-etched into silicon. Each SRAM bit is comprised of between four and six transistors, which is why SRAM takes up much more space compared to DRAM, which uses only one (plus a capacitor). Because an SRAM chip is comprised of thousands or millions of identical cells, it is much easier to make than a CPU, which is a large die with a non-repetitive structure. This is one reason why RAM chips cost much less than processors do. See this discussion of how processors are manufactured; this process is similar (but simplified somewhat) for making memory circuits.

 
### GD32 Microcontroller Increase or Optimize SRAM Usage Solutions For the GD32 microcontroller, when facing insufficient SRAM space issues, several strategies can be employed to either increase available memory or optimize its use. The system clock configuration such as `__SYSTEM_CLOCK_84M_PLL_HXTAL` set at `(uint32_t)(84000000)` does not directly relate to SRAM but is crucial for overall performance optimization which indirectly affects how efficiently other resources like SRAM are used[^1]. #### Optimization Techniques One approach involves optimizing existing code and data structures: - **Code Optimization**: Utilize compiler optimizations by adjusting flags that prioritize size over speed. This reduces executable sizes leaving more room in flash and less pressure on SRAM during execution. - **Data Structure Efficiency**: Review all global variables and static allocations ensuring they do not consume unnecessary amounts of RAM. Employ dynamic allocation cautiously since it may lead to fragmentation. Another method focuses on reducing variable scope where possible so local variables get allocated only within functions rather than globally thereby freeing up precious bytes between calls. #### External Memory Expansion When internal SRAM proves inadequate despite best efforts towards efficiency, expanding with external memories becomes necessary: - **External Static Random Access Memory (SRAM)**: Connecting additional SRAM chips via parallel interfaces provides straightforward expansion options without complex drivers required. - **Serial Peripheral Interface (SPI) Flash/SRAM Devices**: For applications needing non-volatile storage alongside increased volatile memory capacity, SPI-based devices offer compact solutions requiring minimal pin count while providing substantial extra space. Implementing these methods requires careful consideration based upon specific project requirements including cost constraints versus performance gains sought after implementing changes suggested above. ```c // Example C Code Snippet Demonstrating Compiler Flags Adjustment void compile_with_optimization() { // Assuming GCC toolchain; adjust according to actual environment gcc -Os source_file.c -o optimized_program // Prioritizes Size Over Speed } ``` --related questions-- 1. What are some common pitfalls encountered when attempting to expand SRAM using external components? 2. How might one evaluate whether their application would benefit from trading off processing speed against reduced SRAM consumption through aggressive compiler settings? 3. Can you provide examples illustrating effective ways to minimize global/static variable usage in embedded systems programming contexts?
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