| /* ********************************************************************************************************* * 函 数 名: HSI_setSysClk * 功能说明: 设置HSI为系统时钟, * 形 参: * 返 回 值: 无 ********************************************************************************************************* */ void HSI_setSysClk(void) {
__IO uint32_t StartUpCounter = 0, HSIStatus = 0; /* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/ /* Enable HSI*/ //使能内部时钟 RCC->CR |= ((uint32_t)RCC_CR_HSION);//使用内部8M时钟 /* Wait till HSI is ready and if Time out is reached exit */ //等待内部时钟起振 do {
HSIStatus = RCC->CR & RCC_CR_HSIRDY; StartUpCounter++; }while((HSIStatus== 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT)); if ((RCC->CR & RCC_CR_HSIRDY) != RESET)//使用内部8M时钟 {
HSIStatus = (uint32_t)0x01; } else {
HSIStatus = (uint32_t)0x00; } if (HSIStatus == (uint32_t)0x01) {
/* Enable Prefetch Buffer and set Flash Latency */ //flash总线时钟使能 FLASH->ACR |= FLASH_ACR_PRFTBE; FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY; /* HCLK = SYSCLK *///外设AHB总线时钟等于系统时钟 RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; /* PCLK = HCLK *///外设APB总线时钟等于系统时钟 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1; /* PLL configuration = HSI/2 * 12= 48 MHz */ RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL)); RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2&
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